mesa.git
17 months agoaco: create acq+rel barriers instead of acq/rel
Rhys Perry [Wed, 22 Jul 2020 10:47:20 +0000 (11:47 +0100)]
aco: create acq+rel barriers instead of acq/rel

NIR doesn't have atomic loads/stores, so we have to workaround that with
this for dEQP-VK.memory_model.* to pass.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agoaco: improve workgroup-scope and lower vmem/smem barriers
Rhys Perry [Wed, 13 May 2020 15:05:46 +0000 (16:05 +0100)]
aco: improve workgroup-scope and lower vmem/smem barriers

No fossil-db changes on Navi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agoaco: improve sync_info for TCS output stores
Rhys Perry [Tue, 5 May 2020 12:30:12 +0000 (13:30 +0100)]
aco: improve sync_info for TCS output stores

Stop scheduling them as SSBO stores.

No fossil-db changes on Navi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agoaco: use storage_scratch
Rhys Perry [Tue, 5 May 2020 10:54:59 +0000 (11:54 +0100)]
aco: use storage_scratch

fossil-db (Navi):
Totals from 9 (0.01% of 114665) affected shaders:
VMEM: 14456 -> 15312 (+5.92%)
VClause: 336 -> 327 (-2.68%)

Helps 9 Dark Souls 3 shaders a little.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agoaco: enable value numbering of s_buffer_load_*
Rhys Perry [Mon, 29 Jun 2020 12:22:19 +0000 (13:22 +0100)]
aco: enable value numbering of s_buffer_load_*

fossil-db (Navi):
Totals from 33 (0.03% of 114665) affected shaders:
SGPRs: 2176 -> 2152 (-1.10%)
VGPRs: 1572 -> 1564 (-0.51%)
CodeSize: 115988 -> 115472 (-0.44%)
Instrs: 21459 -> 21385 (-0.34%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agonir,radv/aco: add and use pass to lower make available/visible barriers
Rhys Perry [Fri, 1 May 2020 13:32:31 +0000 (14:32 +0100)]
nir,radv/aco: add and use pass to lower make available/visible barriers

Lower them to ACCESS_COHERENT to simplify the backend and
probably give better performance than invalidating or writing back the
entire L0/L1 cache.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agoaco: consider intrinsic access in visit_{load,store}_image
Rhys Perry [Fri, 24 Jul 2020 15:38:33 +0000 (16:38 +0100)]
aco: consider intrinsic access in visit_{load,store}_image

radv_nir_lower_memory_model will use this.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agoradv/aco,aco: use scoped barriers
Rhys Perry [Wed, 13 May 2020 15:12:39 +0000 (16:12 +0100)]
radv/aco,aco: use scoped barriers

fossil-db (Navi):
Totals from 109 (0.08% of 132058) affected shaders:
SGPRs: 5416 -> 5424 (+0.15%)
CodeSize: 460500 -> 460508 (+0.00%); split: -0.07%, +0.07%
Instrs: 87278 -> 87272 (-0.01%); split: -0.09%, +0.09%
Cycles: 2241996 -> 2241852 (-0.01%); split: -0.04%, +0.04%
VMEM: 33868 -> 35539 (+4.93%); split: +5.14%, -0.20%
SMEM: 7183 -> 7184 (+0.01%); split: +0.36%, -0.35%
VClause: 1857 -> 1882 (+1.35%)
SClause: 2052 -> 2055 (+0.15%); split: -0.05%, +0.19%
Copies: 6377 -> 6380 (+0.05%); split: -0.02%, +0.06%
PreSGPRs: 3391 -> 3392 (+0.03%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agoaco: rework barriers and replace can_reorder
Rhys Perry [Fri, 26 Jun 2020 14:54:22 +0000 (15:54 +0100)]
aco: rework barriers and replace can_reorder

fossil-db (Navi):
Totals from 273 (0.21% of 132058) affected shaders:
CodeSize: 937472 -> 936556 (-0.10%)
Instrs: 158874 -> 158648 (-0.14%)
Cycles: 13563516 -> 13562612 (-0.01%)
VMEM: 85246 -> 85244 (-0.00%)
SMEM: 21407 -> 21310 (-0.45%); split: +0.05%, -0.50%
VClause: 9321 -> 9317 (-0.04%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agoaco: add missing add_to_hazard_query
Rhys Perry [Fri, 24 Jul 2020 14:49:43 +0000 (15:49 +0100)]
aco: add missing add_to_hazard_query

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>

17 months agobifrost: Add support for nir_op_iabs
Chris Forbes [Mon, 27 Jul 2020 18:51:31 +0000 (11:51 -0700)]
bifrost: Add support for nir_op_iabs

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6098>

17 months agoanv: fix descriptor set free
Lionel Landwerlin [Mon, 27 Jul 2020 09:06:17 +0000 (12:06 +0300)]
anv: fix descriptor set free

Once we start going through the free list of the descriptor set pool,
we might use a free entry larger than the descriptor set we want to
allocate. When we free that descriptor set, we use the size of the set
rather than the size of the entry that was picked. This leads to leaks
of some amount of descriptor set pool.

This fix saves the size of the entry in the descriptor set so we know
what amount of the pool needs to freed.

v2: Don't bother adding a new size field

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3324
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6084>

17 months agonine: fix incorrect calculation of layer count for 3D textures
Yevhenii Kolesnikov [Fri, 26 Jun 2020 10:40:43 +0000 (13:40 +0300)]
nine: fix incorrect calculation of layer count for 3D textures

Volume textures don't have a concept of "layers"

v1: set last_layer to zero for 3D textures (Axel Davy)

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5808>

17 months agopanfrost: Allow PIPE_TEXTURE_1D_ARRAY textures
Icecream95 [Mon, 27 Jul 2020 09:55:59 +0000 (21:55 +1200)]
panfrost: Allow PIPE_TEXTURE_1D_ARRAY textures

Fixes a crash with wined3d.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6085>

17 months agoi965: propagate error from gen_perf_begin_query to glBeginPerfQueryINTEL
Marcin Ślusarz [Tue, 28 Jul 2020 09:55:16 +0000 (11:55 +0200)]
i965: propagate error from gen_perf_begin_query to glBeginPerfQueryINTEL

Otherwise mesa will crash in glEndPerfQueryINTEL because OA BO is NULL.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6094>

17 months agoiris: propagate error from gen_perf_begin_query to glBeginPerfQueryINTEL
Marcin Ślusarz [Mon, 27 Jul 2020 19:10:25 +0000 (21:10 +0200)]
iris: propagate error from gen_perf_begin_query to glBeginPerfQueryINTEL

Otherwise mesa will crash in glEndPerfQueryINTEL because OA BO is NULL.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6094>

17 months agofreedreno/rnn: Return success when parsing addvariant
Connor Abbott [Tue, 28 Jul 2020 09:33:57 +0000 (11:33 +0200)]
freedreno/rnn: Return success when parsing addvariant

This was missed when I initially added addvariant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno/ci: add a2xx trace to CI job
Rob Clark [Tue, 28 Jul 2020 00:22:42 +0000 (17:22 -0700)]
freedreno/ci: add a2xx trace to CI job

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: deduplicate a2xx disasm
Rob Clark [Sun, 26 Jul 2020 16:47:04 +0000 (09:47 -0700)]
freedreno: deduplicate a2xx disasm

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: move a2xx disasm out of gallium
Rob Clark [Sun, 26 Jul 2020 16:44:01 +0000 (09:44 -0700)]
freedreno: move a2xx disasm out of gallium

So that it can be reused by the decode tools.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: deduplicate a3xx+ disasm
Rob Clark [Sat, 25 Jul 2020 17:28:42 +0000 (10:28 -0700)]
freedreno: deduplicate a3xx+ disasm

Merge the extra tracking that is useful for generating stats from asm
(as opposed to ir), and for guestimating things like inputs and outputs
(mostly useful for r/e) into ir3's version and drop cffdec's version.

There is a small change in disasm output for the decode tools, in that
it no longer prints the used consts, but rather just the max accessed
const.  This is the more useful piece of information, and avoids making
the shared regmask type big enough to deal with the const reg file.
Additional error checking for invalid regids causes crashdec to bail
out sooner when decoding memory that *might* hold valid instructions.
Also, crashdec no longer prints stats, because stats aren't very useful
when trying to decode random instruction memory (which might or might
not be valid instructions).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: drop shader_t
Rob Clark [Sat, 25 Jul 2020 19:16:36 +0000 (12:16 -0700)]
freedreno: drop shader_t

When this code was outside of the mesa tree, we needed our own enum.
Now we can use a common one, to simplify deduplicating the disasm
code.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno/ir3: split out regmask
Rob Clark [Sat, 25 Jul 2020 18:05:20 +0000 (11:05 -0700)]
freedreno/ir3: split out regmask

To unify the ir3 disasm code, we need to add in the regmask based
register tracking from cffdec's version of the disassembler.  Split
out regmask (or at least the part that doesn't depend on ir3) so
it can be shared.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: add CI for envytools tools
Rob Clark [Fri, 24 Jul 2020 17:34:47 +0000 (10:34 -0700)]
freedreno: add CI for envytools tools

This also tunes `.freedreno-rules` a bit so that it isn't triggered by
various tools that don't effect the driver build.

The .gitlab-ci directory is kept separate from the toplevel one so that
updates to (for example) reference decode output do not trigger all the
other-driver jobs to run.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno/afuc: warnings cleanup
Rob Clark [Fri, 24 Jul 2020 21:27:41 +0000 (14:27 -0700)]
freedreno/afuc: warnings cleanup

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno/decode: warnings cleanup
Rob Clark [Fri, 24 Jul 2020 21:14:09 +0000 (14:14 -0700)]
freedreno/decode: warnings cleanup

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno/rnn: warnings cleanup
Rob Clark [Fri, 24 Jul 2020 21:12:04 +0000 (14:12 -0700)]
freedreno/rnn: warnings cleanup

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: slurp in afuc
Rob Clark [Fri, 24 Jul 2020 16:30:04 +0000 (09:30 -0700)]
freedreno: slurp in afuc

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: slurp in decode tools
Rob Clark [Fri, 24 Jul 2020 00:32:36 +0000 (17:32 -0700)]
freedreno: slurp in decode tools

cffdump, crashdec, etc

At this point there is some duplication with other files in-tree (ie.
a2xx and a3xx+ disassembly), which will be cleaned up in a later commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: slurp in rnn
Rob Clark [Thu, 23 Jul 2020 23:51:43 +0000 (16:51 -0700)]
freedreno: slurp in rnn

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: slurp in rnndb
Rob Clark [Thu, 23 Jul 2020 21:59:38 +0000 (14:59 -0700)]
freedreno: slurp in rnndb

Pull in all of $envytools/rnndb (including display, etc) from envytools
commit 6ccdda33ac4d88e19d2a70e1b4edaaab5ec4b026

This changes the directory structure to match the organization in the
envytools tree.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agofreedreno: make gen_header.py check parent directory
Rob Clark [Thu, 23 Jul 2020 22:28:47 +0000 (15:28 -0700)]
freedreno: make gen_header.py check parent directory

With the next commit, the xml files will be no longer be all in the same
directory.  But checking up a single directory level to resolve import
will be sufficient.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6070>

17 months agoradv: Fix host->host signalling with legacy timeline semaphores.
Bas Nieuwenhuizen [Tue, 28 Jul 2020 02:14:23 +0000 (04:14 +0200)]
radv: Fix host->host signalling with legacy timeline semaphores.

Fixes: 88d41367b8a "radv: Add timelines with a VK_KHR_timeline_semaphore impl."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Andres Rodriguez <andresx7@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6097>

17 months agoradv: cleanup locking around timeline waiting.
Dave Airlie [Tue, 28 Jul 2020 02:27:05 +0000 (12:27 +1000)]
radv: cleanup locking around timeline waiting.

Just noticed in passing that this looked extra complicated,
Bas said it was for legacy design reasons, so clean it up.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6099>

17 months agobifrost: Add support for nir_op_imul
Chris Forbes [Sun, 26 Jul 2020 22:54:14 +0000 (15:54 -0700)]
bifrost: Add support for nir_op_imul

Unfortunately this doesn't map nicely to the existing instruction
classes, so we'll make a new one for now.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>

17 months agobifrost: Add support for nir_op_uge
Chris Forbes [Sun, 26 Jul 2020 19:41:17 +0000 (12:41 -0700)]
bifrost: Add support for nir_op_uge

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>

17 months agobifrost: Add support for nir_op_ishl
Chris Forbes [Sun, 26 Jul 2020 19:18:54 +0000 (12:18 -0700)]
bifrost: Add support for nir_op_ishl

Bifrost's bitwise ops include the shift capability. Previously we had
hardcoded the shift to zero in all cases.

There's room in future to emit slightly better code if a shift and a
bitwise operation can be folded together, but not going after that for
now.

This change also removes the separate BI_SHIFT instruction class as
BI_BITWISE can cover both cases.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>

17 months agobifrost: Add support for nir_op_inot
Chris Forbes [Sun, 26 Jul 2020 18:37:42 +0000 (11:37 -0700)]
bifrost: Add support for nir_op_inot

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6091>

17 months agospirv: Handle most execution modes earlier
Caio Marcelo de Oliveira Filho [Tue, 7 Jul 2020 05:58:25 +0000 (22:58 -0700)]
spirv: Handle most execution modes earlier

For convenience in e68871f6a44 ("spirv: Handle constants and types
before execution modes") we moved all execution mode parsing after the
constants and types, so that those using OpExecutionModeId could be
handled together.

Later in 84781e1f1d8 ("spirv/nir: keep track of SPV_KHR_float_controls
execution modes") we had to parse certain non-ID execution modes
before handling constants.

Instead of handling just the float controls related execution modes
early, handle all modes that don't need an ID.  This is a more
"natural" split and will allow other type handling to rely on
execution mode in the future.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6062>

17 months agobifrost: Add lowering for b2i32
Chris Forbes [Sun, 26 Jul 2020 17:43:33 +0000 (10:43 -0700)]
bifrost: Add lowering for b2i32

Since the bool representation is 0/~0, we can convert to int
just by &1.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>

17 months agobifrost: Document d3d/gl comparison control bit
Chris Forbes [Sun, 26 Jul 2020 17:33:06 +0000 (10:33 -0700)]
bifrost: Document d3d/gl comparison control bit

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>

17 months agobifrost: Emit "d3d" variant of comparison instructions
Chris Forbes [Sun, 26 Jul 2020 17:31:13 +0000 (10:31 -0700)]
bifrost: Emit "d3d" variant of comparison instructions

The "d3d" variant uses ~0 as the true value. This is consistent
with NIR's nir_lower_bool_to_int32 pass.

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>

17 months agobifrost: Lower x->bool conversions to != 0
Chris Forbes [Sun, 26 Jul 2020 03:11:11 +0000 (20:11 -0700)]
bifrost: Lower x->bool conversions to != 0

Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>

17 months agotu: Enable resource dynamic indexing
Connor Abbott [Mon, 27 Jul 2020 10:11:44 +0000 (12:11 +0200)]
tu: Enable resource dynamic indexing

This has actually worked since bindless support was merged.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>

17 months agoir3: Fix incorrect src flags for samp_tex
Connor Abbott [Mon, 27 Jul 2020 10:48:37 +0000 (12:48 +0200)]
ir3: Fix incorrect src flags for samp_tex

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>

17 months agoir3: Remove redundant samp_tex validation
Connor Abbott [Mon, 27 Jul 2020 10:47:43 +0000 (12:47 +0200)]
ir3: Remove redundant samp_tex validation

It's already checked in ir3_validate. This way we don't have to fix it
up for bindless.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>

17 months agoir3: Validate bindless samp_tex correctly
Connor Abbott [Mon, 27 Jul 2020 10:46:28 +0000 (12:46 +0200)]
ir3: Validate bindless samp_tex correctly

It's full instead of half precision, because the maximum number of
textures/samplers is much larger.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>

17 months agotu: Fix descriptor update templates with input attachments
Connor Abbott [Mon, 27 Jul 2020 11:17:42 +0000 (13:17 +0200)]
tu: Fix descriptor update templates with input attachments

Found via
dEQP-VK.binding_model.descriptorset_random.sets4.noarray.ubolimitlow.sbolimitlow.sampledimglow.outimgonly.noiub.nouab.frag.ialimitlow.0

Fixes: 159a1300ceb ("turnip: input attachment descriptor set rework")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6087>

17 months agoturnip: fix SP_HS_UNKNOWN_A831 value for A650
Jonathan Marek [Tue, 14 Jul 2020 14:19:15 +0000 (10:19 -0400)]
turnip: fix SP_HS_UNKNOWN_A831 value for A650

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>

17 months agoturnip: use patchControlPoints for HS_INPUT_SIZE value
Jonathan Marek [Tue, 14 Jul 2020 14:11:11 +0000 (10:11 -0400)]
turnip: use patchControlPoints for HS_INPUT_SIZE value

It should be calculated from patchControlPoints, not tcs_vertices_out.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>

17 months agoturnip: move WFI out of draw state to fix a650 hangs
Jonathan Marek [Mon, 6 Jul 2020 03:08:25 +0000 (23:08 -0400)]
turnip: move WFI out of draw state to fix a650 hangs

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>

17 months agofreedreno/ir3: fix wrong local_primitive_id_start type
Jonathan Marek [Tue, 14 Jul 2020 12:55:32 +0000 (08:55 -0400)]
freedreno/ir3: fix wrong local_primitive_id_start type

When changing the patch to use an offset instead of a bool, the type was
accidentally left as bool.

Fixes: f472c9844309 ("freedreno/ir3: add support for a650 tess shared storage")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>

17 months agovulkan/wsi: Convert usage of -1 to UINT32_MAX.
Bas Nieuwenhuizen [Mon, 27 Jul 2020 09:52:24 +0000 (11:52 +0200)]
vulkan/wsi: Convert usage of -1 to UINT32_MAX.

The integers are unsigned so they do the same but this makes it
locally more clear what happened.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6071>

17 months agovulkan/wsi/x11: report device-group present rectangles with prime.
Bas Nieuwenhuizen [Fri, 24 Jul 2020 23:37:57 +0000 (01:37 +0200)]
vulkan/wsi/x11: report device-group present rectangles with prime.

dEQP-VK.wsi.xlib.surface.query_devgroup_present_modes with prime
fail when 0 rectangles are reported. While I believe that test
tests this unintentionally (trying to test the VK_INCOMPLETE return),
I believe it makes sense to always return a rectangle.

In particular we require the data from the given rectangle for
presentation even if we use prime and given that prime is completely
transparent for the app it still counts as local from the perspective
as the application.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6071>

17 months agoradv: call radv_nir_lower_ycbcr_textures after first optimizations
Daniel Schürmann [Sun, 26 Jul 2020 11:22:12 +0000 (13:22 +0200)]
radv: call radv_nir_lower_ycbcr_textures after first optimizations

There might still be tex instructions with undef texture/sampler before
the first round of optimizations. No pipelinedb changes.

Fixes: 14a12b771d0a380defacafe5825362af77ff21bd ('spirv: Rework our handling of images and samplers')
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6083>

17 months agoradv: link with ld_args_build_id
David McFarland [Sun, 26 Jul 2020 20:29:49 +0000 (17:29 -0300)]
radv: link with ld_args_build_id

This is needed for radv_device_get_cache_uuid to work correctly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6081>

17 months agov3d/compiler: request fragment shader clip lowering to be vulkan compatible.
Iago Toral Quiroga [Wed, 22 Jul 2020 06:15:10 +0000 (08:15 +0200)]
v3d/compiler: request fragment shader clip lowering to be vulkan compatible.

Vulkan allows fragment shaders to read gl_ClipDistance[], in which case
the SPIR-V compiler will inject a compact array variable at
VARYING_SLOT_CLIP_DIST0. Request the lowering to always work in terms
of a compact array variable so we don't have to care about the API
in use.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>

17 months agov3d/compiler: handle compact varyings
Iago Toral Quiroga [Tue, 21 Jul 2020 08:01:34 +0000 (10:01 +0200)]
v3d/compiler: handle compact varyings

We are going to need this in Vulkan because the SPIR-V compiler
defines clip distances as a single compact array of scalars, so
our compiler needs to know what to do with them.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>

17 months agonir/lower_clip: make the pass compatible with Vulkan semantics
Iago Toral Quiroga [Tue, 21 Jul 2020 10:21:39 +0000 (12:21 +0200)]
nir/lower_clip: make the pass compatible with Vulkan semantics

Vulkan allows fragment shaders to read gl_ClipDistance[], in which
case the SPIR-V compiler inserts a single compact array variable for
VARYING_SLOW_CLIP_DIST0 and the lowering should not try to inject
its own variables, but instead work in terms of the existing one.
Vulkan drivers are expected to call this with use_clipdist_array set
to true to be consistent with this setup.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>

17 months agoradv: Fix uninitialized variable in renderpass.
Bas Nieuwenhuizen [Fri, 24 Jul 2020 19:56:04 +0000 (21:56 +0200)]
radv: Fix uninitialized variable in renderpass.

Fixes some dEQP-VK.renderpass2.* flakes. Valgrind:

Test case 'dEQP-VK.renderpass2.dedicated_allocation.attachment.8.724'..
==754520== Conditional jump or move depends on uninitialised value(s)
==754520==    at 0x575B21C: radv_layout_is_htile_compressed (radv_image.c:1690)
==754520==    by 0x572F470: radv_handle_depth_image_transition (radv_cmd_buffer.c:5855)
==754520==    by 0x572F2F2: radv_handle_image_transition (radv_cmd_buffer.c:6123)
==754520==    by 0x572EEC6: radv_handle_subpass_image_transition (radv_cmd_buffer.c:3385)
==754520==    by 0x572A104: radv_cmd_buffer_begin_subpass (radv_cmd_buffer.c:4843)
==754520==    by 0x572A007: radv_CmdBeginRenderPass (radv_cmd_buffer.c:4913)
==754520==    by 0x572A197: radv_CmdBeginRenderPass2 (radv_cmd_buffer.c:4921)

Why false?

A renderloop happens when the same attachment is both used as input
attachment and output (color, ds) attachment in a subpass. Of course
this doesn't happen outside of a renderpass and hence we can initialize
it to false at the start of the renderpass.

Fixes: 66131ceb8bc "radv: Pass through render loop detection to internal layout decisions."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3074
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6068>

17 months agonir/lower_io: assert that offsets are used for shader_in
Karol Herbst [Fri, 24 Jul 2020 14:34:43 +0000 (16:34 +0200)]
nir/lower_io: assert that offsets are used for shader_in

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6059>

17 months agoetnaviv: do register setup only once
Christian Gmeiner [Fri, 3 Jul 2020 10:42:56 +0000 (12:42 +0200)]
etnaviv: do register setup only once

Register set setup should be done once at backend
initializaion, as ra_set_finalize is O(r^2*c^2).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>

17 months agoetnaviv: move shader_count to etna_compiler
Christian Gmeiner [Mon, 29 Jun 2020 10:10:55 +0000 (12:10 +0200)]
etnaviv: move shader_count to etna_compiler

Also fix data race on making the shader's id.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>

17 months agoetnaviv: introduce struct etna_compiler
Christian Gmeiner [Mon, 29 Jun 2020 10:02:29 +0000 (12:02 +0200)]
etnaviv: introduce struct etna_compiler

This struct will be used to for state saved across compiler
invocations.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>

17 months agotu: Enable vertex & fragment stores & atomics
Connor Abbott [Fri, 3 Jul 2020 16:44:56 +0000 (18:44 +0200)]
tu: Enable vertex & fragment stores & atomics

Note that there are some extra tess fails, but they're probably
unrelated to the actual feature. There were also some xfails that were
created as part of an earlier attempt to enable the feature which were
fixed in the meantime, so remove them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>

17 months agotu: Detect invalid-for-binning renderpass dependencies
Connor Abbott [Fri, 3 Jul 2020 16:41:42 +0000 (18:41 +0200)]
tu: Detect invalid-for-binning renderpass dependencies

This is all that was missing for stores & atomics.

Closes: #3196
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>

17 months agotu: Fix hangs for DS with no output
Connor Abbott [Wed, 22 Jul 2020 21:52:50 +0000 (23:52 +0200)]
tu: Fix hangs for DS with no output

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>

17 months agotu: Fix empty blit scissor case
Connor Abbott [Tue, 21 Jul 2020 12:36:53 +0000 (14:36 +0200)]
tu: Fix empty blit scissor case

With vertexPipelineStoresAndAtomics enabled, fixes:
dEQP-VK.tessellation.invariance.one_minus_tess_coord_component.quads_fractional_even_spacing_cw_point_mode
dEQP-VK.tessellation.invariance.tess_coord_component_range.triangles_fractional_even_spacing_ccw_point_mode

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>

17 months agospirv: Also copy over binding information for atomic counters
Jason Ekstrand [Fri, 24 Jul 2020 15:04:48 +0000 (10:04 -0500)]
spirv: Also copy over binding information for atomic counters

I missed this if statement so atomic counters weren't getting bindings
and, when you have more than one of them, that meant they were all
getting combined into one.

Fixes: 3584cb09bc15 "spirv: Give atomic counters their own variable mode"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6060>

17 months agotu: Implement VK_KHR_draw_indirect_count
Connor Abbott [Tue, 21 Jul 2020 09:33:33 +0000 (11:33 +0200)]
tu: Implement VK_KHR_draw_indirect_count

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>

17 months agotu: Add missing wfi to tu6_emit_hw()
Connor Abbott [Fri, 24 Jul 2020 13:22:37 +0000 (15:22 +0200)]
tu: Add missing wfi to tu6_emit_hw()

It needs to be there before changing CCU state. This was accidentally
deleted in f494799a7f09deebacb5696fde7514e3329de246 when it should've
been moved.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>

17 months agotu: Integrate WFI/WAIT_FOR_ME/WAIT_MEM_WRITES with cache tracking
Connor Abbott [Mon, 20 Jul 2020 11:12:32 +0000 (13:12 +0200)]
tu: Integrate WFI/WAIT_FOR_ME/WAIT_MEM_WRITES with cache tracking

Track them via pending_flush_bits. Previously WFI was only tracked in
flush_bits and WAIT_FOR_ME was emitted directly. This means that we don't
emit WAIT_FOR_ME or WAIT_FOR_IDLE if there wasn't a cache flush or other
write by the GPU. Also split up host writes from sysmem writes, as only
the former require WFI/WAIT_FOR_ME.

Along the way, I also realized that we were missing proper handling of
transform feedback counter writes which require WAIT_MEM_WRITES. Plumb
that through as well. And CmdDrawIndirectByteCountEXT needs a
WAIT_FOR_ME as it does not wait for WFI internally.

As an example of what this does, a typical barrier for transform
feedback with srcAccess = VK_TRANSFORM_FEEDBACK_WRITE_COUNTER_BIT_EXT
and dstAccess = VK_ACCESS_INDIRECT_COMMAND_READ_BIT used to emit on
A650:

- WAIT_FOR_IDLE

and now we emit:

- WAIT_MEM_WRITES
- WAIT_FOR_ME

So we've eliminated a useless WFI and added some necessary waits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>

17 months agofreedreno: Add INDIRECT_COUNT CP_DRAW_INDIRECT_MULTI variants
Connor Abbott [Tue, 21 Jul 2020 08:48:16 +0000 (10:48 +0200)]
freedreno: Add INDIRECT_COUNT CP_DRAW_INDIRECT_MULTI variants

These have an indirect count which is loaded from an iova, and the
minimum is taken between the indirect and direct counts. Note, I also
had to fix gen_header.py to deal with the extra-long names we get.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>

17 months agofreedreno: Clean up CP_DRAW_MULTI_INDIRECT definition
Connor Abbott [Mon, 20 Jul 2020 14:55:59 +0000 (16:55 +0200)]
freedreno: Clean up CP_DRAW_MULTI_INDIRECT definition

Depends on the envytools changes to make the "addvariant" magic work in
order to decode this correctly, and to be able to print the register
names directly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>

17 months agoturnip: remove extra gmem alignment
Jonathan Marek [Thu, 18 Jun 2020 03:42:48 +0000 (23:42 -0400)]
turnip: remove extra gmem alignment

Now that we clear the PITCHALIGN" field when filling GMEM input attachment
descriptors, we can get rid of the extra tile width alignment on a630/a640.

With the "block_align_shift" value change, this brings down the default
gmem_align from 16k to 4k on a630/a640 and down from 24k to 12k on a650,
to match the gallium driver.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5528>

17 months agoetnaviv: explicitly set nir_variable_mode
Christian Gmeiner [Mon, 20 Jul 2020 19:40:16 +0000 (21:40 +0200)]
etnaviv: explicitly set nir_variable_mode

No functional changes - fixes the following assert:
  nir_lower_io_impl: Assertion `!(modes & ~supported_modes)' failed.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5997>

17 months agoradv: clean up remaining pipeline init functions
Samuel Pitoiset [Fri, 10 Jul 2020 07:03:44 +0000 (09:03 +0200)]
radv: clean up remaining pipeline init functions

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: remove useless return value to radv_pipeline_scratch_init()
Samuel Pitoiset [Fri, 10 Jul 2020 06:54:58 +0000 (08:54 +0200)]
radv: remove useless return value to radv_pipeline_scratch_init()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: add radv_pipeline_init_shader_stages_state()
Samuel Pitoiset [Fri, 10 Jul 2020 06:53:00 +0000 (08:53 +0200)]
radv: add radv_pipeline_init_shader_stages_state()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: constify all radv_pipeline_generate_*() helpers
Samuel Pitoiset [Thu, 9 Jul 2020 09:54:37 +0000 (11:54 +0200)]
radv: constify all radv_pipeline_generate_*() helpers

To make clear that the pipeline should be read only.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: assign pipeline gfx fields before PM4 emission
Samuel Pitoiset [Thu, 9 Jul 2020 09:43:29 +0000 (11:43 +0200)]
radv: assign pipeline gfx fields before PM4 emission

To be able to constify all radv_pipeline_generate_*() helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: clean up binning state initialization
Samuel Pitoiset [Thu, 9 Jul 2020 09:49:32 +0000 (11:49 +0200)]
radv: clean up binning state initialization

It's no longer emitted directly in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: clean up adjusting MSAA state if conservative rast is enabled
Samuel Pitoiset [Thu, 9 Jul 2020 09:36:45 +0000 (11:36 +0200)]
radv: clean up adjusting MSAA state if conservative rast is enabled

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: add radv_pipeline_generate_vgt_gs_out()
Samuel Pitoiset [Thu, 9 Jul 2020 09:07:02 +0000 (11:07 +0200)]
radv: add radv_pipeline_generate_vgt_gs_out()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: add radv_pipeline_init_input_assembly_state()
Samuel Pitoiset [Thu, 9 Jul 2020 09:05:54 +0000 (11:05 +0200)]
radv: add radv_pipeline_init_input_assembly_state()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: clean up tessellation state emission
Samuel Pitoiset [Thu, 9 Jul 2020 08:42:57 +0000 (10:42 +0200)]
radv: clean up tessellation state emission

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: remove unnecessary radv_tessellation_state::lds_size
Samuel Pitoiset [Thu, 9 Jul 2020 08:36:28 +0000 (10:36 +0200)]
radv: remove unnecessary radv_tessellation_state::lds_size

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: set LDS TCS size at shaders creation for GFX9+
Samuel Pitoiset [Thu, 9 Jul 2020 08:33:16 +0000 (10:33 +0200)]
radv: set LDS TCS size at shaders creation for GFX9+

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: align the LDS size in calculate_tess_lds_size()
Samuel Pitoiset [Thu, 9 Jul 2020 08:06:43 +0000 (10:06 +0200)]
radv: align the LDS size in calculate_tess_lds_size()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: remove one unnecessary param to radv_generate_graphics_pipeline_key()
Samuel Pitoiset [Thu, 9 Jul 2020 06:40:13 +0000 (08:40 +0200)]
radv: remove one unnecessary param to radv_generate_graphics_pipeline_key()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: remove no-op si_multiwave_lds_size_workaround()
Samuel Pitoiset [Wed, 8 Jul 2020 19:45:09 +0000 (21:45 +0200)]
radv: remove no-op si_multiwave_lds_size_workaround()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: remove unnecessary radv_tessellation_state::num_patches
Samuel Pitoiset [Wed, 8 Jul 2020 19:35:23 +0000 (21:35 +0200)]
radv: remove unnecessary radv_tessellation_state::num_patches

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: clean up radv_compute_generate_pm4()
Samuel Pitoiset [Wed, 8 Jul 2020 15:48:49 +0000 (17:48 +0200)]
radv: clean up radv_compute_generate_pm4()

For consistency regarding how the graphics pipeline is built.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: reduce the number of allocated dwords for compute CS
Samuel Pitoiset [Wed, 8 Jul 2020 15:49:14 +0000 (17:49 +0200)]
radv: reduce the number of allocated dwords for compute CS

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: clean up PA_SC_CLIPRECT_RULE emission
Samuel Pitoiset [Wed, 8 Jul 2020 15:06:10 +0000 (17:06 +0200)]
radv: clean up PA_SC_CLIPRECT_RULE emission

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: clean up VGT_SHADER_STAGES_EN emission
Samuel Pitoiset [Wed, 8 Jul 2020 15:00:19 +0000 (17:00 +0200)]
radv: clean up VGT_SHADER_STAGES_EN emission

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: emit PA_SC_LINE_CNTL as part of the rasterization state
Samuel Pitoiset [Wed, 8 Jul 2020 14:51:54 +0000 (16:51 +0200)]
radv: emit PA_SC_LINE_CNTL as part of the rasterization state

While we are at it, remove one useless field in radv_multisample_state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: emit more invariant registers as part of the initial gfx state
Samuel Pitoiset [Wed, 8 Jul 2020 13:59:42 +0000 (15:59 +0200)]
radv: emit more invariant registers as part of the initial gfx state

This reduces the number of emitted packets for pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: remove outdated TODO related to PA_SU_VTX_CNTL.PIX_CENTER
Samuel Pitoiset [Wed, 8 Jul 2020 13:56:47 +0000 (15:56 +0200)]
radv: remove outdated TODO related to PA_SU_VTX_CNTL.PIX_CENTER

It should be always 1, nothing more to check.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>

17 months agoradv: remove set but unused radv_pipeline::vertex_elements
Samuel Pitoiset [Wed, 8 Jul 2020 13:02:00 +0000 (15:02 +0200)]
radv: remove set but unused radv_pipeline::vertex_elements

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>