mesa.git
21 months agoetnaviv: update Android build files
Martin Fuzzey [Fri, 17 Jan 2020 16:37:03 +0000 (17:37 +0100)]
etnaviv: update Android build files

etnaviv no longer builds on Android, fix this.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3447>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3447>

21 months agoaco: use nir_move_copies
Rhys Perry [Tue, 14 Jan 2020 11:42:11 +0000 (11:42 +0000)]
aco: use nir_move_copies

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoradv/aco: use ACO for GS copy shaders
Rhys Perry [Fri, 15 Nov 2019 12:42:46 +0000 (12:42 +0000)]
radv/aco: use ACO for GS copy shaders

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoaco: implement GS copy shaders
Rhys Perry [Fri, 15 Nov 2019 11:31:03 +0000 (11:31 +0000)]
aco: implement GS copy shaders

v5: rebase on float_controls changes
v7: rebase after shader args MR and load/store vectorizer MR

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoaco: remove needs_instance_id
Rhys Perry [Fri, 15 Nov 2019 11:47:10 +0000 (11:47 +0000)]
aco: remove needs_instance_id

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoaco: explicitly mark end blocks for exports
Rhys Perry [Fri, 15 Nov 2019 11:43:19 +0000 (11:43 +0000)]
aco: explicitly mark end blocks for exports

For GS copy shaders, whether we want to do exports is conditional. By
explicitly marking the end blocks, we can mark an IF's then branch as an
export block and ensure that's where the assembler inserts null exports.

v6: only fixup exports in the end block, like before
v8: simplify some code

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoradv/aco: allow ACO for GS
Rhys Perry [Mon, 14 Oct 2019 16:45:09 +0000 (17:45 +0100)]
radv/aco: allow ACO for GS

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoaco: implement GS on GFX7-8
Rhys Perry [Thu, 14 Nov 2019 20:14:01 +0000 (20:14 +0000)]
aco: implement GS on GFX7-8

GS is the same on GFX6, but GFX6 isn't fully supported yet.

v4: fix regclass
v7: rebase after shader args MR

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoradv/aco,aco: implement GS on GFX9+
Rhys Perry [Mon, 14 Oct 2019 16:46:02 +0000 (17:46 +0100)]
radv/aco,aco: implement GS on GFX9+

v2: implement GFX10
v3: rebase
v7: rebase after shader args MR
v8: fix gs_vtx_offset usage on GFX9/GFX10
v8: use unreachable() instead of printing intrinsic
v8: rename output_state to ge_output_state
v8: fix formatting around nir_foreach_variable()
v8: rename some helpers in the scheduler
v8: rename p_memory_barrier_all to p_memory_barrier_common
v8: fix assertion comparing ctx.stage against vertex_geometry_gs

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoaco: improve support for s_sendmsg
Rhys Perry [Mon, 14 Oct 2019 16:21:04 +0000 (17:21 +0100)]
aco: improve support for s_sendmsg

In particular, the messages needed for GS.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoradv: move gs copy shader creation before other variants
Rhys Perry [Fri, 20 Sep 2019 12:45:42 +0000 (13:45 +0100)]
radv: move gs copy shader creation before other variants

ACO lowers output derefs which breaks the shader_info pass used by gs copy
shader creation.

v3: rebase

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2421>

21 months agoaco: Make a better guess at which instructions need the VCC hint.
Timur Kristóf [Tue, 7 Jan 2020 09:12:08 +0000 (10:12 +0100)]
aco: Make a better guess at which instructions need the VCC hint.

Previously, bool_to_vector_condition would always set the VCC hint
on its result. This commit improves it by having the optimizer set
the VCC hint only when the result really needs to be in the VCC.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3451>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3451>

21 months agogallium/swr: implementation of tessellation shaders compilation
Jan Zielinski [Tue, 21 Jan 2020 15:01:05 +0000 (16:01 +0100)]
gallium/swr: implementation of tessellation shaders compilation

TCS and TES shaders compilation mechanisms in SWR and state
management implementation.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Acked-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3484>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3484>

21 months agoradv: Allow DCC & TC-compat HTILE with VK_IMAGE_CREATE_EXTENDED_USAGE_BIT.
Bas Nieuwenhuizen [Thu, 16 Jan 2020 01:33:35 +0000 (02:33 +0100)]
radv: Allow DCC & TC-compat HTILE with VK_IMAGE_CREATE_EXTENDED_USAGE_BIT.

I misunderstood the flag when initially disabling. But this flag
only does something with mutable formats. If we have DCC and
mutable formats, the formats are close enough that the allowed
usage flags are not meaningfully different nor used during
allocation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3424>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3424>

21 months agoradv: Expose VK_KHR_swapchain_mutable_format.
Bas Nieuwenhuizen [Thu, 16 Jan 2020 02:07:32 +0000 (03:07 +0100)]
radv: Expose VK_KHR_swapchain_mutable_format.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2354
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3425>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3425>

21 months agofreedreno: Document CP_INDIRECT_BUFFER_CHAIN
Connor Abbott [Thu, 23 Jan 2020 15:36:18 +0000 (16:36 +0100)]
freedreno: Document CP_INDIRECT_BUFFER_CHAIN

This will let us use batch chaining instead of growing batches on a5xx
and a6xx.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3537>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3537>

21 months agofreedreno: Document CP_UNK_A6XX_55
Connor Abbott [Thu, 23 Jan 2020 13:42:01 +0000 (14:42 +0100)]
freedreno: Document CP_UNK_A6XX_55

Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3537>

21 months agofreedreno: Document CP_COND_REG_EXEC more
Connor Abbott [Fri, 20 Dec 2019 14:16:54 +0000 (15:16 +0100)]
freedreno: Document CP_COND_REG_EXEC more

The vulkan blob uses the RENDER_MODE mode to condition a blit on the
render mode in traces of a dEQP triangle test.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3182>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3182>

21 months agoac/llvm: fix missing casts in ac_build_readlane()
Samuel Pitoiset [Thu, 23 Jan 2020 11:27:07 +0000 (12:27 +0100)]
ac/llvm: fix missing casts in ac_build_readlane()

Because ac_build_optimization_barrier() overwrites the original
src_type, we have to keep track of it before emitting that barrier.
Otherwise, wrong conversions are expected for pointers or small
bitsizes.

By doing this, we no longer need to do the cast dance in
ac_build_readlane_no_opt_barrier(), it was just necessary for
ac_build_optimization_barrier().

This fixes a bunch of crashes with subgroups related tests when
RADV_DEBUG=checkir is enabled, and it also fixes a compiler crash
with The Surge 2.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2395
Fixes: 0f45d4dc2b1 ("ac: add ac_build_readlane without optimization barrier")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3535>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3535>

21 months agoanv/apply_pipeline_layout: Initialize the nir_builder before use
Jason Ekstrand [Fri, 24 Jan 2020 03:24:15 +0000 (21:24 -0600)]
anv/apply_pipeline_layout: Initialize the nir_builder before use

Fixes: #2410
Fixes: 3c754900b5f "nir: don't emit ishl in _nir_mul_imm() if backend doesn't support bitops"
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3548>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3548>

21 months agomeson: Prefer 'iris' by default over 'i965'.
Kenneth Graunke [Sat, 23 Nov 2019 06:24:52 +0000 (22:24 -0800)]
meson: Prefer 'iris' by default over 'i965'.

This changes the default driver for Intel Gen8-11 hardware to be
the newer 'iris' driver rather than the older 'i965' driver.  To
continue using i965, pass -Dprefer-iris=false when building.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3540>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3540>

21 months agodrisw: Cache the depth of the X drawable
Adam Jackson [Mon, 6 Jan 2020 16:06:30 +0000 (11:06 -0500)]
drisw: Cache the depth of the X drawable

This is not always ->rgbBits, because there are cases where that could
be 32 but we're (legally) bound to a depth-24 pixmap. The important
thing to have match here is the actual server-side notion of depth.  You
can look this up (at modest expense) from the xlib visual info if the
fbconfig has a visual. But it might not, so if not, fetch it (at
slightly greater expense) from XGetGeometry. Do this at GLX drawable
creation so you don't have to do it on the SwapBuffers path.

Apparently this fixes glx/glx-swap-singlebuffer, which is unintentional
but quite pleasant.

Fixes: mesa/mesa#2291
Fixes: 90d58286 ("drisw: Fix and simplify drawable setup")
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3305>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3305>

21 months agoturnip: Convert the rest of tu_cmd_buffer.c over to the new pack macros.
Eric Anholt [Fri, 17 Jan 2020 00:02:06 +0000 (16:02 -0800)]
turnip: Convert the rest of tu_cmd_buffer.c over to the new pack macros.

There are only a couple of hard cases left using pkt4, where the register
number to write is computed.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3455>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3455>

21 months agoturnip: Convert renderpass setup to the new register packing macros.
Eric Anholt [Fri, 17 Jan 2020 22:02:37 +0000 (14:02 -0800)]
turnip: Convert renderpass setup to the new register packing macros.

This gets a lot of the hard code converted over to the new macros,
resulting in (I feel) much more readable code with
LESS_SHOUTING_ABOUT_THE_REG().  I decided to consistently put the reg on
its own line, so that all the register names line up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3455>

21 months agoturnip: Port krh's packing macros from freedreno to tu.
Eric Anholt [Thu, 16 Jan 2020 23:38:37 +0000 (15:38 -0800)]
turnip: Port krh's packing macros from freedreno to tu.

This introduces some minor unpacking of the temporary fd_reg_pair structs
to code that previously was packing a whole register field.

In the pack wrapper in tu_cs.h, I added some explanatory docs, dropped the
relocs handling since we don't need it, and removed the extra regs[] in
the __ONE_REG() macro (which was causing gcc's optimizer to fall on its
face in my release build).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3455>

21 months agofreedreno: Fix OUT_REG() on address regs without a .bo supplied.
Eric Anholt [Fri, 17 Jan 2020 22:28:13 +0000 (14:28 -0800)]
freedreno: Fix OUT_REG() on address regs without a .bo supplied.

Sometimes you want to zero out an address by supplying a NULL BO, but
without this we would end up only emitting one dword.  Increases size of
fd6_gmem.o by .8%, though it's not clear to me why (no obvious terrible
codegen happening)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3455>

21 months agofreedreno: Add some missing a6xx address declarations.
Eric Anholt [Fri, 17 Jan 2020 00:05:06 +0000 (16:05 -0800)]
freedreno: Add some missing a6xx address declarations.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3455>

21 months agorelnotes: Add GL_INTEL_shader_integer_functions2 and VK_INTEL_shader_integer_functions2
Ian Romanick [Thu, 23 Jan 2020 21:32:51 +0000 (13:32 -0800)]
relnotes: Add GL_INTEL_shader_integer_functions2 and VK_INTEL_shader_integer_functions2

Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
21 months agolima: use imul for calculations with intrinsic src
Vasily Khoruzhick [Thu, 23 Jan 2020 04:30:31 +0000 (20:30 -0800)]
lima: use imul for calculations with intrinsic src

It's source is supposed to be int, so we have to use integer
multiplication otherwise we'll get undefined result.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3529>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3529>

21 months agonir: don't emit ishl in _nir_mul_imm() if backend doesn't support bitops
Vasily Khoruzhick [Thu, 23 Jan 2020 04:29:50 +0000 (20:29 -0800)]
nir: don't emit ishl in _nir_mul_imm() if backend doesn't support bitops

Otherwise we'll have to lower it later.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3529>

21 months agopan/decode: Rotate trace files
Icecream95 [Wed, 22 Jan 2020 21:32:18 +0000 (10:32 +1300)]
pan/decode: Rotate trace files

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>

21 months agopan/decode: Dump to a file
Icecream95 [Wed, 22 Jan 2020 21:23:17 +0000 (10:23 +1300)]
pan/decode: Dump to a file

The file name is taken from the environment variable
PANDECODE_DUMP_FILE, defaulting to pandecode.dump if it is not set.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>

21 months agopan/decode: Support dumping to a file
Icecream95 [Wed, 22 Jan 2020 21:14:35 +0000 (10:14 +1300)]
pan/decode: Support dumping to a file

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>

21 months agopan/bifrost: Support disassembling to a file
Icecream95 [Wed, 22 Jan 2020 20:59:57 +0000 (09:59 +1300)]
pan/bifrost: Support disassembling to a file

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>

21 months agopan/midgard: Support disassembling to a file
Icecream95 [Wed, 22 Jan 2020 20:42:12 +0000 (09:42 +1300)]
pan/midgard: Support disassembling to a file

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>

21 months agopan/midgard: Fix a memory leak in the disassembler
Icecream95 [Wed, 22 Jan 2020 20:33:48 +0000 (09:33 +1300)]
pan/midgard: Fix a memory leak in the disassembler

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>

21 months agoturnip: Fix execution of secondary cmd bufs with nothing in primary.
Eric Anholt [Wed, 22 Jan 2020 21:19:32 +0000 (13:19 -0800)]
turnip: Fix execution of secondary cmd bufs with nothing in primary.

We want to finish off cmd emission in the primary CS and add its entry to
the IB, but regardless of whether there had been anything in the primary
CS to emit, we still need a reserved CS entry for the loop below.

Fixes crashes in dEQP-VK.binding_model.shader_access.secondary_cmd_buf.*
and many more in dEQP-VK.renderpass*

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3524>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3524>

21 months agopanfrost: Drop mysterious zero=0xFFFF field
Alyssa Rosenzweig [Sat, 18 Jan 2020 19:45:37 +0000 (14:45 -0500)]
panfrost: Drop mysterious zero=0xFFFF field

It doesn't seem to affect any results and it's not at all clear if/why
the blob sometimes(?) sets it? So let's clean this up since this
solution isn't correct anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3513>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3513>

21 months agopan/midgard: Fix bundle dynarray leak
Icecream95 [Tue, 21 Jan 2020 21:43:23 +0000 (10:43 +1300)]
pan/midgard: Fix bundle dynarray leak

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3496>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3496>

21 months agoradeonsi: separate LLVM compilation from non-LLVM code
Marek Olšák [Thu, 16 Jan 2020 00:10:23 +0000 (19:10 -0500)]
radeonsi: separate LLVM compilation from non-LLVM code

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: change prototypes of si_is_multi_part_shader & si_is_merged_shader
Marek Olšák [Thu, 16 Jan 2020 00:08:44 +0000 (19:08 -0500)]
radeonsi: change prototypes of si_is_multi_part_shader & si_is_merged_shader

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: make si_compile_shader return bool
Marek Olšák [Wed, 15 Jan 2020 23:57:25 +0000 (18:57 -0500)]
radeonsi: make si_compile_shader return bool

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: make si_compile_llvm return bool
Marek Olšák [Wed, 15 Jan 2020 23:54:39 +0000 (18:54 -0500)]
radeonsi: make si_compile_llvm return bool

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: move more LLVM functions into si_shader_llvm.c
Marek Olšák [Wed, 15 Jan 2020 23:41:06 +0000 (18:41 -0500)]
radeonsi: move more LLVM functions into si_shader_llvm.c

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: fold si_shader_context_set_ir into si_build_main_function
Marek Olšák [Wed, 15 Jan 2020 23:28:48 +0000 (18:28 -0500)]
radeonsi: fold si_shader_context_set_ir into si_build_main_function

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: move si_nir_build_llvm into si_shader_llvm.c
Marek Olšák [Wed, 15 Jan 2020 23:26:09 +0000 (18:26 -0500)]
radeonsi: move si_nir_build_llvm into si_shader_llvm.c

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: minor cleanup in si_shader_internal.h
Marek Olšák [Wed, 15 Jan 2020 23:08:54 +0000 (18:08 -0500)]
radeonsi: minor cleanup in si_shader_internal.h

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: move si_shader_llvm_build.c content into si_shader_llvm.c
Marek Olšák [Wed, 15 Jan 2020 23:06:02 +0000 (18:06 -0500)]
radeonsi: move si_shader_llvm_build.c content into si_shader_llvm.c

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: move VS shader code into si_shader_llvm_vs.c
Marek Olšák [Wed, 15 Jan 2020 23:01:19 +0000 (18:01 -0500)]
radeonsi: move VS shader code into si_shader_llvm_vs.c

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: move non-LLVM code out of si_shader_llvm.c
Marek Olšák [Wed, 15 Jan 2020 22:28:29 +0000 (17:28 -0500)]
radeonsi: move non-LLVM code out of si_shader_llvm.c

There was also some redundant code in si_shader_nir.c

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoradeonsi: use ctx->ac. for types and integer constants
Marek Olšák [Wed, 15 Jan 2020 22:25:06 +0000 (17:25 -0500)]
radeonsi: use ctx->ac. for types and integer constants

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3421>

21 months agoturnip: simplify tu_physical_device_get_format_properties
Jonathan Marek [Tue, 21 Jan 2020 13:30:40 +0000 (08:30 -0500)]
turnip: simplify tu_physical_device_get_format_properties

Fixes the "bad VkImageTiling" error when tiling is
VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3485>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3485>

21 months agovulkan/wsi: remove unused image_get_modifier
Jonathan Marek [Tue, 21 Jan 2020 13:32:49 +0000 (08:32 -0500)]
vulkan/wsi: remove unused image_get_modifier

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3485>

21 months agoturnip: set linear tiling for scanout images
Jonathan Marek [Tue, 21 Jan 2020 13:46:58 +0000 (08:46 -0500)]
turnip: set linear tiling for scanout images

Fixes: 210e6887 "vulkan/wsi: Use the interface from the real modifiers extension"
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3485>

21 months agoturnip: hook up GetImageDrmFormatModifierPropertiesEXT
Jonathan Marek [Tue, 21 Jan 2020 13:32:32 +0000 (08:32 -0500)]
turnip: hook up GetImageDrmFormatModifierPropertiesEXT

Fixes: 210e6887 "vulkan/wsi: Use the interface from the real modifiers extension"
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3485>

21 months agofreedreno/drm: Don't miscalculate timeout
Guido Günther [Wed, 22 Jan 2020 10:43:11 +0000 (11:43 +0100)]
freedreno/drm: Don't miscalculate timeout

The current code overflows (s * 1000000000) for s >= 5 but that is
e.g. used in msm_bo_cpu_prep.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3514>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3514>

21 months agoturnip: Add support for fine derivatives.
Eric Anholt [Tue, 21 Jan 2020 20:24:49 +0000 (12:24 -0800)]
turnip: Add support for fine derivatives.

This does appear to be the required instruction sequence (dsxpp_1 dst src;
dsxpp_1.p dst src) as dropping either instruction fails the testsuite.

Fixes dEQP-VK.glsl.derivate.*

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3494>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3494>

21 months agofreedreno/ir3: Plumb the ir3_shader_variant into legalize.
Eric Anholt [Wed, 22 Jan 2020 18:53:17 +0000 (10:53 -0800)]
freedreno/ir3: Plumb the ir3_shader_variant into legalize.

legalize is computing a lot of state that goes in the variant, let's just
store it directly instead of passing pointers around.  This leaves
max_bary in place, which is doing some surprising work (overwriting the
original total_in in some cases).

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3494>

21 months agoutil/hash_table: update users to use new optimal integer hash functions
Anthony Pesch [Thu, 16 Jan 2020 14:11:16 +0000 (09:11 -0500)]
util/hash_table: update users to use new optimal integer hash functions

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3475>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3475>

21 months agoutil/hash_table: added hash functions for integer types
Anthony Pesch [Sat, 18 Jan 2020 06:38:31 +0000 (01:38 -0500)]
util/hash_table: added hash functions for integer types

A few hash_table users roll their own integer hash functions which
call _mesa_hash_data to perform the hashing which ultimately calls
into XXH32 with a dynamic key length. When using small keys with a
constant size the hash rate can be greatly improved by inlining
XXH32 and providing it a constant key length, see:
https://fastcompression.blogspot.com/2018/03/xxhash-for-small-keys-impressive-power.html

Additionally, this patch removes calls to _mesa_key_hash_string and
makes them instead call _mesa_has_string directly, matching the new
integer hash functions.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3475>

21 months agoutil/hash_table: replace _mesa_hash_data's fnv1a hash function with xxhash
Anthony Pesch [Sat, 18 Jan 2020 05:54:10 +0000 (00:54 -0500)]
util/hash_table: replace _mesa_hash_data's fnv1a hash function with xxhash

For most key sizes, xxhash outperforms fnv1a's hash rate substantially (bug
2153). In particular, the V3D driver hashes multiple ~200 byte keys as part
of the shader cache lookup which can easily eat up 10-20% of the runtime on
the Raspberry Pi. Swapping over to xxhash drops this to ~1% of the runtime.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3475>

21 months agoutil: move fnv1a hash implementation into its own header
Anthony Pesch [Sat, 18 Jan 2020 05:51:42 +0000 (00:51 -0500)]
util: move fnv1a hash implementation into its own header

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3475>

21 months agoutil: import xxhash
Anthony Pesch [Sat, 18 Jan 2020 05:47:19 +0000 (00:47 -0500)]
util: import xxhash

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3475>

21 months agowinsys/amdgpu: Close KMS handles for other DRM file descriptions
Michel Dänzer [Mon, 23 Dec 2019 17:59:10 +0000 (18:59 +0100)]
winsys/amdgpu: Close KMS handles for other DRM file descriptions

When a BO or amdgpu_screen_winsys is destroyed.

Should fix leaking such BOs in other DRM file descriptions.

v2:
* Pass the correct file descriptor to drmIoctl (Pierre-Eric
  Pelloux-Prayer)
* Use _mesa_hash_table_remove
v3:
* Close handles in amdgpu_winsys_unref as well
v4:
* Adapt to amdgpu_winsys::sws_list_lock.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2270
Fixes: 11a3679e3aba "winsys/amdgpu: Make KMS handles valid for original
                     DRM file descriptor"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3202>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3202>

21 months agowinsys/amdgpu: Re-use amdgpu_screen_winsys when possible
Michel Dänzer [Mon, 6 Jan 2020 17:47:41 +0000 (18:47 +0100)]
winsys/amdgpu: Re-use amdgpu_screen_winsys when possible

Namely, if os_same_file_description determined that the DRM file
descriptor references the same file description.

v2:
* Adapt to amdgpu_winsys::sws_list_lock.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3202>

21 months agoutil: Add os_same_file_description helper
Michel Dänzer [Mon, 6 Jan 2020 17:24:52 +0000 (18:24 +0100)]
util: Add os_same_file_description helper

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3202>

21 months agowinsys/amdgpu: Only re-export KMS handles for different DRM FDs
Michel Dänzer [Mon, 23 Dec 2019 17:51:57 +0000 (18:51 +0100)]
winsys/amdgpu: Only re-export KMS handles for different DRM FDs

When the amdgpu_screen_winsys uses the same FD as the amdgpu_winsys
(which is always the case for the first amdgpu_screen_winsys), we can
just use bo->u.real.kms_handle.

v2:
* Also only create the kms_handles hash table if the
  amdgpu_screen_winsys fd is different from the amdgpu_winsys one.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3202>

21 months agowinsys/amdgpu: Keep track of retrieved KMS handles using hash tables
Michel Dänzer [Mon, 30 Sep 2019 16:00:50 +0000 (18:00 +0200)]
winsys/amdgpu: Keep track of retrieved KMS handles using hash tables

The assumption being that KMS handles are only retrieved for relatively
few BOs, so hash tables should be efficient both in terms of performance
and memory consumption.

We use the address of struct amdgpu_winsys_bo as the key and its
kms_handle field (the KMS handle valid for the DRM file descriptor
passed to amdgpu_device_initialize) as the hash value.

v2:
* Add comment above amdgpu_screen_winsys::kms_handles (Pierre-Eric
  Pelloux-Prayer)
v3:
* Protect kms_handles hash table with amdgpu_winsys::sws_list_lock
  mutex.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3202>

21 months agowinsys/amdgpu: Keep a list of amdgpu_screen_winsyses in amdgpu_winsys
Michel Dänzer [Mon, 30 Sep 2019 16:36:06 +0000 (18:36 +0200)]
winsys/amdgpu: Keep a list of amdgpu_screen_winsyses in amdgpu_winsys

v2:
* Add dedicated mutex for the list.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3202>

21 months agoaco: implement nir_op_f2i64/nir_op_f2u64 on GFX6
Samuel Pitoiset [Tue, 21 Jan 2020 08:13:46 +0000 (09:13 +0100)]
aco: implement nir_op_f2i64/nir_op_f2u64 on GFX6

V_TRUNC_F64 and V_FLOOR_F64 needs to be lowered on GFX6.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoaco: implement 64-bit nir_op_ffloor on GFX6
Samuel Pitoiset [Mon, 20 Jan 2020 08:00:07 +0000 (09:00 +0100)]
aco: implement 64-bit nir_op_ffloor on GFX6

GFX6 doesn't have V_FLOOR_F64, it needs to be lowered. Loosely based
on the AMDGPU LLVM backend.

Introduce a new function because it will be useful for some other
64-bit operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoaco: implement 64-bit nir_op_fround_even on GFX6
Samuel Pitoiset [Tue, 21 Jan 2020 07:57:07 +0000 (08:57 +0100)]
aco: implement 64-bit nir_op_fround_even on GFX6

GFX6 doesn't have V_RNDNE_F64, it needs to be lowered. Loosely based
on the AMDGPU LLVM backend.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoaco: implement 64-bit nir_op_fceil on GFX6
Samuel Pitoiset [Tue, 21 Jan 2020 07:16:59 +0000 (08:16 +0100)]
aco: implement 64-bit nir_op_fceil on GFX6

GFX6 doesn't have V_CEIL_F64, it needs to be lowered. Loosely based
on the AMDGPU LLVM backend.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoaco: implement 64-bit nir_op_ftrunc on GFX6
Samuel Pitoiset [Mon, 20 Jan 2020 17:39:57 +0000 (18:39 +0100)]
aco: implement 64-bit nir_op_ftrunc on GFX6

GFX6 doesn't have V_TRUNC_F64, it needs to be lowered. Loosely based
on the AMDGPU LLVM backend.

Introduce a new function because it will be useful for some other
64-bit operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoaco: implement nir_intrinsic_global_atomic_* on GFX6
Samuel Pitoiset [Fri, 17 Jan 2020 15:11:55 +0000 (16:11 +0100)]
aco: implement nir_intrinsic_global_atomic_* on GFX6

GFX6 doesn't have FLAT instructions, use MUBUF instructions instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoaco: implement nir_intrinsic_load_global on GFX6
Samuel Pitoiset [Fri, 17 Jan 2020 14:14:41 +0000 (15:14 +0100)]
aco: implement nir_intrinsic_load_global on GFX6

GFX6 doesn't have FLAT instructions, use MUBUF instructions instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoaco: implement nir_intrinsic_store_global on GFX6
Samuel Pitoiset [Fri, 17 Jan 2020 12:22:16 +0000 (13:22 +0100)]
aco: implement nir_intrinsic_store_global on GFX6

GFX6 doesn't have FLAT instructions, use MUBUF instructions instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoaco: fix wrong IR in nir_intrinsic_load_barycentric_at_sample
Samuel Pitoiset [Tue, 21 Jan 2020 08:47:18 +0000 (09:47 +0100)]
aco: fix wrong IR in nir_intrinsic_load_barycentric_at_sample

Only GFX6 was affected, my mistake. The total number of SGPR operands
should be 4 when we want to create a vec4.

Fixes: dbdf3b3ef97 ("aco: implement nir_intrinsic_load_barycentric_at_sample on GFX6")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3477>

21 months agoanv/iris: warn gen12 3DSTATE_HS restriction
Lionel Landwerlin [Tue, 21 Jan 2020 15:54:01 +0000 (17:54 +0200)]
anv/iris: warn gen12 3DSTATE_HS restriction

This should never happen but better off documenting it in case someone
plays with max threads numbers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3489>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3489>

21 months agogallium/swr: add option for static link
Krzysztof Raszkowski [Wed, 22 Jan 2020 11:26:45 +0000 (12:26 +0100)]
gallium/swr: add option for static link

Set swr-shared to 'false' to link SWR statically into Mesa.
Only one swr arch can be specified if swr-shared is set to false.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3510>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3510>

21 months agoaco: fix printing assembly with CLRXdisasm on GFX6
Samuel Pitoiset [Mon, 20 Jan 2020 17:41:00 +0000 (18:41 +0100)]
aco: fix printing assembly with CLRXdisasm on GFX6

We thought that CLRXdisasm allowed gfx600 as well as gfx700 but
it actually doesn't. Use the family for GFX6 chips instead.

Fixes: 0099f85232b ("aco: print assembly with CLRXdisasm for GFX6-GFX7 if found on the system")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3531>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3531>

21 months agoclover/meson: Define OpenCL header macros
Pierre Moreau [Tue, 17 Dec 2019 17:11:10 +0000 (18:11 +0100)]
clover/meson: Define OpenCL header macros

Rather than defining the macros any time right before including an
OpenCL header, set Meson to define them for the whole clover project.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3137>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3137>

21 months agoclover: Use the dispatch table type from the OpenCL headers
Pierre Moreau [Tue, 17 Dec 2019 16:27:53 +0000 (17:27 +0100)]
clover: Use the dispatch table type from the OpenCL headers

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2243
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3137>

21 months agoinclude/CL: Update OpenCL headers to latest
Pierre Moreau [Tue, 17 Dec 2019 16:23:43 +0000 (17:23 +0100)]
include/CL: Update OpenCL headers to latest

This latest update contains a new header that defines the dispatch table
structure in order to avoid OpenCL implementations having to define it
themselves.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3137>

21 months agoradv: advertise VK_AMD_shader_fragment_mask
Samuel Pitoiset [Thu, 16 May 2019 10:26:16 +0000 (12:26 +0200)]
radv: advertise VK_AMD_shader_fragment_mask

Only for GFX8+ because it's untested on older generations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3304>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3304>

21 months agoaco: add support for nir_texop_fragment_{mask}_fetch
Samuel Pitoiset [Tue, 7 Jan 2020 14:18:58 +0000 (15:18 +0100)]
aco: add support for nir_texop_fragment_{mask}_fetch

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3304>

21 months agoac/nir: add support for nir_texop_fragment_{mask}_fetch
Samuel Pitoiset [Thu, 16 May 2019 12:43:23 +0000 (14:43 +0200)]
ac/nir: add support for nir_texop_fragment_{mask}_fetch

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3304>

21 months agonir/lower_input_attachments: lower nir_texop_fragment_{mask}_fetch
Samuel Pitoiset [Tue, 7 Jan 2020 09:01:14 +0000 (10:01 +0100)]
nir/lower_input_attachments: lower nir_texop_fragment_{mask}_fetch

These instructions are allowed to fetch from multisampled
subpass input attachments.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3304>

21 months agospirv: add support for SpvOpFragment{Mask}FetchAMD operations
Samuel Pitoiset [Tue, 7 Jan 2020 07:45:24 +0000 (08:45 +0100)]
spirv: add support for SpvOpFragment{Mask}FetchAMD operations

nir_tex_src_ms_index is re-used for the fragment index with
nir_texop_fragment_fetch to avoid introducing a new texture source type.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3304>

21 months agonir: add two new texture ops for multisample fragment color/mask fetches
Samuel Pitoiset [Tue, 7 Jan 2020 07:39:39 +0000 (08:39 +0100)]
nir: add two new texture ops for multisample fragment color/mask fetches

This introduces:
   - nir_texop_fragment_mask_fetch (fetch a fragment mask from a
     compressed multisampled color surface)
   - nir_texop_fragment_fetch (fetch a color fragment for a
     particular sample at corresponding fragment mask index).

These two texture operations are necessary for implementing
SPV_AMD_shader_fragment_mask.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3304>

21 months agospirv: add SpvCapabilityFragmentMaskAMD
Samuel Pitoiset [Thu, 16 May 2019 10:25:40 +0000 (12:25 +0200)]
spirv: add SpvCapabilityFragmentMaskAMD

This new capability is for SPV_AMD_shader_fragment_mask.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3304>

21 months agoradv: handle missing implicit subpass dependencies
Samuel Pitoiset [Thu, 9 Jan 2020 09:55:54 +0000 (10:55 +0100)]
radv: handle missing implicit subpass dependencies

When a subpass doesn't declare an explicit dependency from/to
VK_SUBPASS_EXTERNAL, Vulkan says there is an implicit dependency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3330>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3330>

21 months agoradv: add explicit external subpass dependencies to meta operations
Samuel Pitoiset [Thu, 9 Jan 2020 09:36:12 +0000 (10:36 +0100)]
radv: add explicit external subpass dependencies to meta operations

No functional changes because a subpass dependency with dstStageMask
set to VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT is a no-op.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3330>

21 months agogallivm: fix find lsb
Dave Airlie [Mon, 20 Jan 2020 04:56:36 +0000 (14:56 +1000)]
gallivm: fix find lsb

the GLSL return value is different than the llvm intrinsic.

Fixes arb gpu shader5 tests

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3528>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3528>

21 months agogalllivm: fix gather offset casting
Dave Airlie [Mon, 20 Jan 2020 03:21:28 +0000 (13:21 +1000)]
galllivm: fix gather offset casting

cast texture offsets to 32-bit integers

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3528>

21 months agollvmpipe: fix some integer instruction lowering.
Dave Airlie [Mon, 20 Jan 2020 03:16:49 +0000 (13:16 +1000)]
llvmpipe: fix some integer instruction lowering.

We want to lower to shifts for bitfields, and lower ifind_msb.

Fixes a bunch of gpu shader5 tests.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3528>

21 months agogallivm: fix gather component handling.
Dave Airlie [Mon, 20 Jan 2020 02:03:23 +0000 (12:03 +1000)]
gallivm: fix gather component handling.

Fixes the extended gather test for gpu shader5

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3528>

21 months agoturnip: Add support for uniform texel buffers.
Eric Anholt [Wed, 22 Jan 2020 20:25:10 +0000 (12:25 -0800)]
turnip: Add support for uniform texel buffers.

Pretty straightforward: Port texture descriptor code from freedreno, fill
in alignment limits from closed vk, and tu_cmd_buffer.c was already
uploading the texture descriptor.

This doesn't implement storage texel buffers (required in the compute
pipeline) yet, since those will need an IBO descriptor for the store path.
Still, making the load path be connected to the texture descriptor won't
hurt.

Part of #2237

Fixes dEQP-VK.binding_model.shader_access.primary_cmd_buf.uniform_texel_buffer.*

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3522>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3522>

21 months agointel: Fix aux map alignments on 32-bit builds.
Kenneth Graunke [Wed, 22 Jan 2020 00:46:24 +0000 (16:46 -0800)]
intel: Fix aux map alignments on 32-bit builds.

ALIGN() brilliantly uses uintptr_t, making it unsafe for use with 64-bit
GPU addresses in 32-bit builds of the driver.  Use align64() instead,
which uses uint64_t.

Fixes assertion failures when running any 32-bit program on Tigerlake.

Fixes: 2e6a7ced4db ("iris/gen12: Write GFX_AUX_TABLE base address register")
Fixes: 0d0290bb3f7 ("intel/common: Add surface to aux map translation table support")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3507>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3507>

21 months agoutil: Remove tmp argument from BITSET_FOREACH_SET macro
Matt Turner [Tue, 21 Jan 2020 23:07:24 +0000 (15:07 -0800)]
util: Remove tmp argument from BITSET_FOREACH_SET macro

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3499>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3499>