mesa.git
13 months agoradv: align the TMA BO size to 256
Samuel Pitoiset [Tue, 25 Aug 2020 09:42:32 +0000 (11:42 +0200)]
radv: align the TMA BO size to 256

The hardware requires 256 byte-aligned address.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6453>

13 months agogitlab-ci: Test the traces from bgfx
Rohan Garg [Tue, 10 Mar 2020 17:52:28 +0000 (18:52 +0100)]
gitlab-ci: Test the traces from bgfx

bgfx is a corss-platform graphics API which ships with
a bunch of examples. Let's capture renderdoc traces of
these examples and test them.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4162>

13 months agomesa: fix formatting of messages printed using _mesa_log
Marcin Ślusarz [Mon, 24 Aug 2020 19:13:50 +0000 (21:13 +0200)]
mesa: fix formatting of messages printed using _mesa_log

... on BOTH _WIN32 and !_WIN32

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6443>

13 months agoanv: fix transform feedback surface size
Lionel Landwerlin [Fri, 21 Aug 2020 20:13:06 +0000 (23:13 +0300)]
anv: fix transform feedback surface size

Non multiple 4 sizes are causing issue in particular < 4.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3450
Fixes: 36ee2fd61c8f ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6430>

13 months agost/mesa: Fix EGLImageTargetTexture2D for GL_TEXTURE_2D
Woody Chow [Wed, 19 Aug 2020 05:19:12 +0000 (14:19 +0900)]
st/mesa: Fix EGLImageTargetTexture2D for GL_TEXTURE_2D

Before this change, internalFormat was defaulted to GL_RGBA (
unsized internal format). Therefore, subsequent glTexSubImage2D
call with type != GL_UNSIGNED_BYTE, GL_UNSIGNED_SHORT_4_4_4_4 or
GL_UNSIGNED_SHORT_5_5_5_1 would give GL_INVALID_OPERATION.

This fixes

android.graphics.cts.BitmapColorSpaceTest#test16bitHardware
android.graphics.cts.ImageDecoderTest#testDecodeBitmap*
android.graphics.cts.BitmapTest#testNdkFormatsHardware

in CtsGraphicsTestCases

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6382>

13 months agomeson: Fix lmsensors warning message.
Vinson Lee [Thu, 20 Aug 2020 01:56:19 +0000 (18:56 -0700)]
meson: Fix lmsensors warning message.

Fixes: 138c003d2273 ("meson: deprecated 'true' and 'false' in combo options for 'enabled' and 'disabled'")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6397>

13 months agofreedreno: Drop UNIFORM_BUFFER_OFFSET_ALIGNMENT to 32
Eric Anholt [Thu, 20 Aug 2020 23:43:16 +0000 (16:43 -0700)]
freedreno: Drop UNIFORM_BUFFER_OFFSET_ALIGNMENT to 32

This is the value exposed by the a3xx-a4xx drivers according to an
official Adreno OpenGL ES Developer guide I found, and also a report I saw
for a5xx while googling.  Fixes renderdoc replay of a manhattan31 trace
captured on a Pixel 3a.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6416>

13 months agonir,amd: remove trinary_minmax opcodes
Daniel Schürmann [Thu, 18 Jun 2020 14:14:20 +0000 (15:14 +0100)]
nir,amd: remove trinary_minmax opcodes

These consist of the variations nir_op_{i|u|f}{min|max|med}3 which are either
lowered in the backend (LLVM) anyway or can be recombined by the backend (ACO).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6421>

13 months agofreedreno: handle case of shadowing current render target
Rob Clark [Fri, 21 Aug 2020 22:58:37 +0000 (15:58 -0700)]
freedreno: handle case of shadowing current render target

If you have a sequence where there is a single buffer associated with
the current render target, and then you end up shadowing it on the 3d
pipe (u_blitter), because of how we swap the new shadow and rsc before
the back-blit, you could end up confusing things into thinking that
the blitters framebuffer state is the same as the current framebuffer
state.

Re-organizing the sequence to swap after the blit is complicated when
also having to deal with CPU memcpy blit path, and the batch/rsc
accounting.  So instead just detect this case and flush if we need to.

Fixes:
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_draw

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6434>

13 months agofreedreno: add debug helper to dump buffers
Rob Clark [Fri, 21 Aug 2020 19:50:34 +0000 (12:50 -0700)]
freedreno: add debug helper to dump buffers

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6434>

13 months agofreedreno/a6xx: refactor debug logging
Rob Clark [Fri, 21 Aug 2020 14:52:33 +0000 (07:52 -0700)]
freedreno/a6xx: refactor debug logging

Break it out into a helper fxn, and cleanup the copy/pasta.  Also, add
something so we can tell when src and/or dst are UBWC.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6434>

13 months agogallium/tgsi: add helper tgsi_get_interp_mode
Marek Olšák [Sat, 22 Aug 2020 10:28:52 +0000 (06:28 -0400)]
gallium/tgsi: add helper tgsi_get_interp_mode

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agost/mesa: handle lowered IO in st_nir_assign_vs_in_locations
Marek Olšák [Fri, 14 Aug 2020 05:32:00 +0000 (01:32 -0400)]
st/mesa: handle lowered IO in st_nir_assign_vs_in_locations

There are piglit failures without this.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agost/mesa: don't generate NIR for ARB_vp/fp if NIR is not preferred
Marek Olšák [Wed, 12 Aug 2020 15:09:43 +0000 (11:09 -0400)]
st/mesa: don't generate NIR for ARB_vp/fp if NIR is not preferred

Fixes: 5d0630e5043fc2 "st/mesa: call prog_to_nir sooner for ARB_fp"
Fixes: a3de63fbb3d63e "st/mesa: don't generate VS TGSI if NIR is enabled"
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agost/mesa: don't pass NIR to draw module if IO is lowered
Marek Olšák [Fri, 14 Aug 2020 05:30:49 +0000 (01:30 -0400)]
st/mesa: don't pass NIR to draw module if IO is lowered

The draw module can't handle it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agonir: generate lowered IO in nir_lower_passthrough_edgeflags
Marek Olšák [Thu, 13 Aug 2020 14:27:57 +0000 (10:27 -0400)]
nir: generate lowered IO in nir_lower_passthrough_edgeflags

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agonir: add interpolation qualifiers for color sysvals into shader_info
Marek Olšák [Thu, 13 Aug 2020 19:14:19 +0000 (15:14 -0400)]
nir: add interpolation qualifiers for color sysvals into shader_info

needed by radeonsi

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agonir: add shader_info::io_lowered
Marek Olšák [Fri, 14 Aug 2020 23:13:52 +0000 (19:13 -0400)]
nir: add shader_info::io_lowered

This will drive decisions in many NIR passes and st/mesa.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agonir: properly identify texcoords for lowered IO in nir_lower_drawpixels
Marek Olšák [Fri, 14 Aug 2020 05:54:19 +0000 (01:54 -0400)]
nir: properly identify texcoords for lowered IO in nir_lower_drawpixels

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agonir: print IO semantics (v2)
Marek Olšák [Fri, 14 Aug 2020 23:34:27 +0000 (19:34 -0400)]
nir: print IO semantics (v2)

v2: print GS streams readably

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agonir: update IO semantics in nir_io_add_const_offset_to_base
Marek Olšák [Fri, 14 Aug 2020 23:33:50 +0000 (19:33 -0400)]
nir: update IO semantics in nir_io_add_const_offset_to_base

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agonir: gather all IO info from IO intrinsics
Marek Olšák [Fri, 14 Aug 2020 23:31:46 +0000 (19:31 -0400)]
nir: gather all IO info from IO intrinsics

nir_io_add_const_offset_to_base will shrink num_slots, so it's better to
call it before nir_shader_gather_info.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agonir: save IO semantics in lowered IO intrinsics
Marek Olšák [Wed, 12 Aug 2020 03:48:12 +0000 (23:48 -0400)]
nir: save IO semantics in lowered IO intrinsics

This enables drivers and utils to get all IO information from intrinsics,
so that they don't have to walk the complex types of NIR variables to find
out other information about IO intrinsics.

NIR in/out variables can be removed after nir_lower_io. We could remove
the variables in the pass, but for now I just decided to remove
the variables in radeonsi before shaders are returned to st/mesa.
(st/mesa just needs adjustments to work without NIR in/out variables)

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6442>

13 months agointel/perf: fix raw query kernel metric selection
Lionel Landwerlin [Mon, 24 Aug 2020 10:52:59 +0000 (13:52 +0300)]
intel/perf: fix raw query kernel metric selection

The raw query is meant to be used with MDAPI [1]. When using this
metric without this library, we usually selected the TestOa metric to
provide some default sensible values (instead of undefined).
Historically this TestOa metric lived in the kernel at ID=1. We
removed all metrics from the kernel in kernel commit 9aba9c188da136
("drm/i915/perf: remove generated code").

This fixes the Mesa code to use a valid metric set ID (1 could work
some of the time, but not guaranteed).

[1] : https://github.com/intel/metrics-discovery

v2: Store fallback metric at init time

v3: Drop TestOa lookout

v4: Skip the existing queries (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CC: <mesa-stable@lists.freedesktop.org>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com> (v1)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6438>

13 months agointel/perf: store query symbol name
Lionel Landwerlin [Mon, 24 Aug 2020 13:42:42 +0000 (16:42 +0300)]
intel/perf: store query symbol name

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke's avatarKenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6438>

13 months agonir/load_store_vectorizer: Clean up unit test swizzle assertions.
Eric Anholt [Fri, 21 Aug 2020 20:37:07 +0000 (13:37 -0700)]
nir/load_store_vectorizer: Clean up unit test swizzle assertions.

They're hard to write and read, so put together a little helper to clean
up both the code and the gtest output on failure.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6431>

13 months agofreedreno/ir3: Replace our custom vec4 UBO intrinsic with the shared lowering.
Eric Anholt [Tue, 18 Aug 2020 22:45:02 +0000 (15:45 -0700)]
freedreno/ir3: Replace our custom vec4 UBO intrinsic with the shared lowering.

This gets us fewer comparisons in the shaders that we need to optimize
back out, and reduces backend code.

total instructions in shared programs: 11547270 -> 7219930 (-37.48%)
total full in shared programs: 334268 -> 319602 (-4.39%)

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6378>

13 months agonir: Add a lowering pass for backends wanting load_ubo with vec4 offsets.
Eric Anholt [Tue, 18 Aug 2020 18:38:41 +0000 (11:38 -0700)]
nir: Add a lowering pass for backends wanting load_ubo with vec4 offsets.

This is very common for backends -- r600, freedreno, and nir_to_tgsi all
needed versions of it.  Make a common intrinsic to use for it with a
shared, slightly-tuned-from-ir3 lowering pass.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6378>

13 months agonir: Add nir_[iu]shr_imm and nir_udiv_imm helpers and use them.
Eric Anholt [Fri, 21 Aug 2020 18:21:33 +0000 (11:21 -0700)]
nir: Add nir_[iu]shr_imm and nir_udiv_imm helpers and use them.

I was doing math manually in a lowering pass for converting a division to
a ushr, and this will let the pass be expressed more naturally.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6378>

13 months agonir: Make the nir_builder *_imm helpers consistently handle bit size.
Eric Anholt [Fri, 21 Aug 2020 18:15:24 +0000 (11:15 -0700)]
nir: Make the nir_builder *_imm helpers consistently handle bit size.

We always want to demote the y to the bit size of the ssa def, but also
want to sanity check that our input and our masking is big enough.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6378>

13 months agoaco: Fix convert_to_SDWA when instruction has 3 operands.
Timur Kristóf [Sat, 22 Aug 2020 18:45:54 +0000 (20:45 +0200)]
aco: Fix convert_to_SDWA when instruction has 3 operands.

Previously, when the instruction had 3 operands, this would cause
possible corruption because of writing to sdwa->sel[2].
This was noticed thanks to GCC 10's -Wstringop-overflow warning.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6436>

13 months agoaco: Fix unused variable warning by adding ASSERTED.
Timur Kristóf [Sat, 22 Aug 2020 18:41:45 +0000 (20:41 +0200)]
aco: Fix unused variable warning by adding ASSERTED.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6436>

13 months agor300: Use util_blend_factor_uses_dest
Alyssa Rosenzweig [Thu, 20 Aug 2020 15:45:53 +0000 (11:45 -0400)]
r300: Use util_blend_factor_uses_dest

v2: Fix missing { and #include (trivial)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Marek Olšák <marek.olsak@amd.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6407>

13 months agosi: Use util_blend_factor_uses_dest
Alyssa Rosenzweig [Thu, 20 Aug 2020 15:35:39 +0000 (11:35 -0400)]
si: Use util_blend_factor_uses_dest

Driver-local copy is redundant.

v2: Fix missing #include (trivial)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
Reviewed-by: Marek Olšák <marek.olsak@amd.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6407>

13 months agogallium: Add util_blend_uses_dest helper
Alyssa Rosenzweig [Thu, 20 Aug 2020 15:45:38 +0000 (11:45 -0400)]
gallium: Add util_blend_uses_dest helper

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6407>

13 months agogallium: Add util_blend_factor_uses_dest helper
Alyssa Rosenzweig [Tue, 18 Aug 2020 21:28:38 +0000 (17:28 -0400)]
gallium: Add util_blend_factor_uses_dest helper

Drivers may be able to optimize cases where blending is enabled but the
destination colour is not used. This helps detect that case.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6407>

13 months agoradv: use the trap handler to detect faulty shaders/instructions
Samuel Pitoiset [Tue, 18 Aug 2020 16:52:35 +0000 (18:52 +0200)]
radv: use the trap handler to detect faulty shaders/instructions

It should reliably report the faulty shader but the faulty instruction
is inacurate, especially for memory violations because it's reported
when the addr is processed. It will be improved by emitting more
wait-states.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoradv: enable the trap handler and configure the shader exceptions
Samuel Pitoiset [Tue, 18 Aug 2020 06:49:11 +0000 (08:49 +0200)]
radv: enable the trap handler and configure the shader exceptions

When TRAP_PRESENT is not enabled, all traps and exceptions are ignored.
Only EXCP_EN.mem_viol is currently supported because the other
exceptions have to be tested/validated first.

EXCP_EN.mem_viol is used to detect any sort of invalid memory
access like VM fault. When a memory violation is reported, the
hw jumps to the trap handler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoradv: add initial trap handler support with RADV_TRAP_HANDLER=1
Samuel Pitoiset [Tue, 18 Aug 2020 16:51:46 +0000 (18:51 +0200)]
radv: add initial trap handler support with RADV_TRAP_HANDLER=1

A trap handler is used to handle shader exceptions like memory
violations, divide by zero etc. The trap handler shader code will
help to identify the faulty shader/instruction and to report
more information for better debugging.

This has only been tested on GFX8, though it should work on GFX6-GFX7.
It seems we need a different implemenation for GFX9+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoradv: add a small interface for creating the trap handler shader
Samuel Pitoiset [Tue, 18 Aug 2020 16:44:07 +0000 (18:44 +0200)]
radv: add a small interface for creating the trap handler shader

Similar to the GS copy shader except that NIR is unused because
the shader is written directly using ACO IR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoaco: skip unnecessary compiler pass for the trap handler program
Samuel Pitoiset [Fri, 21 Aug 2020 09:33:22 +0000 (11:33 +0200)]
aco: skip unnecessary compiler pass for the trap handler program

The shader is written by hands with assigned registers, so most of
the pass are unnecessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoaco: add a helper for building a trap handler shader
Samuel Pitoiset [Tue, 18 Aug 2020 16:39:20 +0000 (18:39 +0200)]
aco: add a helper for building a trap handler shader

It's way easier to write a trap handler shader using ACO IR
instead of writing disassembly by hand + clrxasm + copy&paste.

This trap handler is quite simple for now, it just loads a
buffer descriptor from the TMA BO, it saves ttmp0-1 which
contain various info about the faulty instruction, and it
stores some hw registers about the wave/trap status.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoaco: validate that SMEM operands can use fixed registers
Samuel Pitoiset [Wed, 19 Aug 2020 07:41:42 +0000 (09:41 +0200)]
aco: validate that SMEM operands can use fixed registers

To fix a validation error when loading the scalar tma buffer
descriptor because it's not a temp but a fixed reg (tma_lo/tma_hi).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoaco: add TBA/TMA/TTMP0-11 physical registers definitions
Samuel Pitoiset [Tue, 18 Aug 2020 07:26:48 +0000 (09:26 +0200)]
aco: add TBA/TMA/TTMP0-11 physical registers definitions

The TBA/TMA scalar registers are only available on GFX6-GFX8.

On GFX9+, TBA/TMA addr are stored in hardware registers and
the number of TTMP scalar registers is thus increased by 4.
Just keep in mind that tba_lo is actually ttmp0. Best would
be to support ttmp registers in RA but that's more complicated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoamd/registers: add some SQ_WAVE_* register definitions
Samuel Pitoiset [Tue, 18 Aug 2020 12:54:51 +0000 (14:54 +0200)]
amd/registers: add some SQ_WAVE_* register definitions

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agoamd/registers: add missing TBA registers on GFX6-GFX8
Samuel Pitoiset [Tue, 18 Aug 2020 06:34:33 +0000 (08:34 +0200)]
amd/registers: add missing TBA registers on GFX6-GFX8

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>

13 months agonir: add iabs-lowering code
Erik Faye-Lund [Fri, 10 Jan 2020 21:59:54 +0000 (22:59 +0100)]
nir: add iabs-lowering code

Microsoft's DXIL is based on LLVM, which doesn't have an integer ABS
opcode, but instead needs it lowered to NEG + MAX. We need to do this
with an option, to prevent an already existing optimization rule from
undoing this.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5211>

13 months agoegl: drop invalid shebang
Eric Engestrom [Mon, 3 Aug 2020 23:31:52 +0000 (01:31 +0200)]
egl: drop invalid shebang

This file exports a variable that is then used in a python script,
but it can never be executed by itself, so having a shebang here
makes no sense.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6166>

13 months agoclover: Call clang with -O0 for the SPIR-V path
Jason Ekstrand [Fri, 14 Aug 2020 20:48:59 +0000 (15:48 -0500)]
clover: Call clang with -O0 for the SPIR-V path

SPIRV-LLVM-Translator isn't really built for handling optimized LLVM IR.
It tends to fall over when, for instance, an optimization generates an
i96 type which isn't legal in SPIR-V.  Pass -O0 to avoid these cases.
See https://github.com/KhronosGroup/SPIRV-LLVM-Translator/issues/203.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6432>

13 months agoclover/spirv: Don't call llvm::regularizeLlvmForSpirv
Jason Ekstrand [Thu, 13 Aug 2020 20:12:15 +0000 (15:12 -0500)]
clover/spirv: Don't call llvm::regularizeLlvmForSpirv

writeSpirv() already takes care of that, and calling it twice seems to
duplicate functions and cause problems when processing execution modes.

Fixes: 2043c5f37cf "clover/llvm: Add functions for compiling from..."
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6306>

13 months agointel/nir: Allow splitting a single load into up to 32 loads
Jason Ekstrand [Fri, 21 Aug 2020 04:59:54 +0000 (23:59 -0500)]
intel/nir: Allow splitting a single load into up to 32 loads

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>

13 months agointel/fs: Fix an assert in load_scratch
Jason Ekstrand [Wed, 19 Aug 2020 23:53:32 +0000 (18:53 -0500)]
intel/fs: Fix an assert in load_scratch

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>

13 months agoiris: Always re-upload sysvals when we have kernel inputs
Jason Ekstrand [Fri, 21 Aug 2020 04:47:51 +0000 (23:47 -0500)]
iris: Always re-upload sysvals when we have kernel inputs

They can change on every dispatch and clover never gives us a heads up.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>

13 months agoiris: Normalize all compute shaders to MESA_SHADER_COMPUTE
Jason Ekstrand [Fri, 21 Aug 2020 16:31:18 +0000 (11:31 -0500)]
iris: Normalize all compute shaders to MESA_SHADER_COMPUTE

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>

13 months agoiris: ref/unref the GLSL type singleton in screen_create/destroy
Jason Ekstrand [Sat, 15 Aug 2020 05:26:05 +0000 (00:26 -0500)]
iris: ref/unref the GLSL type singleton in screen_create/destroy

Otherwise, we can run into trouble if the driver is dynamically loaded
via pipe-loader.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>

13 months agoiris: Stop advertising clover-only caps
Jason Ekstrand [Wed, 19 Aug 2020 23:56:01 +0000 (18:56 -0500)]
iris: Stop advertising clover-only caps

Both of these are clover-only caps.  We don't really support clover and,
even if we did, the number of address bits is wrong and we definitely
don't support the CL path for images.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>

13 months agoiris: Stop advertising PIPE_SHADER_IR_NIR_SERIALIZED
Jason Ekstrand [Thu, 20 Aug 2020 15:30:23 +0000 (10:30 -0500)]
iris: Stop advertising PIPE_SHADER_IR_NIR_SERIALIZED

This prevents clover from trying to initialize and crashing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>

13 months agoclover/nir: add support for global invocation id offsets
Karol Herbst [Wed, 19 Aug 2020 14:02:55 +0000 (16:02 +0200)]
clover/nir: add support for global invocation id offsets

v2: create variables only once

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>

13 months agonir: fix nir_variable_create for kernels
Karol Herbst [Fri, 21 Aug 2020 16:46:33 +0000 (18:46 +0200)]
nir: fix nir_variable_create for kernels

We ended up with INTERP_MODE_SMOOTH but we really just want to have NONE.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>

13 months agospirv: Use new global invocation offset system value
Jesse Natalie [Tue, 28 Jul 2020 17:37:09 +0000 (10:37 -0700)]
spirv: Use new global invocation offset system value

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>

13 months agonir: Add options to nir_lower_compute_system_values to control compute ID base lowering
Jesse Natalie [Fri, 21 Aug 2020 17:40:45 +0000 (10:40 -0700)]
nir: Add options to nir_lower_compute_system_values to control compute ID base lowering

If no options are provided, existing intrinsics are used.
If the lowering pass indicates there should be offsets used for global
invocation ID or work group ID, then those instructions are lowered to
include the offset.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>

13 months agonir: Move compute system value lowering to a separate pass
Jesse Natalie [Fri, 21 Aug 2020 17:18:14 +0000 (10:18 -0700)]
nir: Move compute system value lowering to a separate pass

The actual variable -> intrinsic lowering stays where it is, but
ops which convert one intrinsic to be implemented in terms of
another have moved.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>

13 months agocompiler/nir: make lowering global-id to local-id optional
Erik Faye-Lund [Mon, 13 Jan 2020 09:35:40 +0000 (10:35 +0100)]
compiler/nir: make lowering global-id to local-id optional

For D3D12, we don't want to lower this, as there's a dedicated global-id
system-value that might be faster to use, depending on the hardware.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>

13 months agonir: Add new system values and intrinsics for dealing with CL work offsets
Jesse Natalie [Mon, 27 Jul 2020 23:56:21 +0000 (16:56 -0700)]
nir: Add new system values and intrinsics for dealing with CL work offsets

New intrinsics are added for global invocation IDs and work group IDs to
deal with offsets in both. The only one of these that needs a system value
is global invocation offset, for CL's get_global_offset().

Note that CL requires very large work group sizes, so these intrinsics
are modified to be able to use 64bit values, for 64bit SPIR-V.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>

13 months agonir: Populate some places where existing system values were missing
Jesse Natalie [Fri, 29 May 2020 18:09:37 +0000 (11:09 -0700)]
nir: Populate some places where existing system values were missing

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>

13 months agoci/bare-metal: Try rebooting chezas again if they get stuck during tftp.
Eric Anholt [Wed, 19 Aug 2020 18:41:51 +0000 (11:41 -0700)]
ci/bare-metal: Try rebooting chezas again if they get stuck during tftp.

Occasionally something goes weird in the network and a group of chezas
will produce streams of these errors during the tftp process, eventually
timing out after 60 minutes in the job.  By the time we notice, the next
jobs seem to go through fine, so watch for them and try rebooting the
cheza to see if that gets our jobs to pass again.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6398>

13 months agoci/bare-metal: Retry booting chezas instead of failing when !POWER_GOOD
Eric Anholt [Wed, 19 Aug 2020 23:28:27 +0000 (16:28 -0700)]
ci/bare-metal: Retry booting chezas instead of failing when !POWER_GOOD

If we get this error, we can just try rebooting again and see if it comes
up then.  The POWER_GOOD failures are clustered in time, but it's better
to retry a few times in a row in one job (which has its own 60min timeout)
than to spuriously fail someone's pipeline.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6398>

13 months agoci/bare-metal: Convert the main cros-servo boot code to python
Eric Anholt [Wed, 19 Aug 2020 22:23:24 +0000 (15:23 -0700)]
ci/bare-metal: Convert the main cros-servo boot code to python

Switching this part to python makes the code clearer and cleans up our
logs as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6398>

13 months agoci/bare-metal: Use a new serial buffer tool.
Eric Anholt [Wed, 19 Aug 2020 20:00:25 +0000 (13:00 -0700)]
ci/bare-metal: Use a new serial buffer tool.

This one uses python threads to move some of our logic from shell
pipelines to python, and opens the door to doing better serial output
tracking in the future (the SerialBuffer.lines() method)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6398>

13 months agovirgl: update protocol headers
Chia-I Wu [Thu, 2 Jul 2020 18:40:43 +0000 (11:40 -0700)]
virgl: update protocol headers

Copied from virglrenderer.  Some in-development features are guarded by
VIRGL_RENDERER_UNSTABLE_APIS and they should not be used without knowing
the consequences.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6235>

13 months agovirgl: move protocol headers to a common place
Chia-I Wu [Thu, 2 Jul 2020 18:06:15 +0000 (11:06 -0700)]
virgl: move protocol headers to a common place

Tested with meson.  Android.mk changes are not tested.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6235>

13 months agoutil/ralloc: fix ralloc alignment.
Lepton Wu [Fri, 14 Aug 2020 02:14:13 +0000 (19:14 -0700)]
util/ralloc: fix ralloc alignment.

On some malloc implementation, malloc doesn't always align to 16
bytes even on 64 bits system. To make sure ralloc_header always
starts at the wanted alignment, just force the size to be aligned at
the alignment of ralloc_header. This fixes crashed on instruction
like "movaps %xmm0,0x10(%rax)" which requires aligned memory access.

Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6314>

13 months agosvga: fix draw elements with 8-bits indices
Charmaine Lee [Thu, 20 Aug 2020 22:45:47 +0000 (15:45 -0700)]
svga: fix draw elements with 8-bits indices

With commit 2122b902b80, u_index_translator can return U_TRANSLATE_MEMCPY
for 8-bits indices, and in this case we need to call the translation function
instead of a simple passthrough to the device.

Fixes piglit spec@nv_primitive_restart tests.

Fixes: 2122b902b8 "gallium/indices: don't expand prim-type for 8-bit indices"
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6414>

13 months agowinsys/svga: fix display corruption after surface_init
Charmaine Lee [Thu, 20 Aug 2020 23:43:00 +0000 (16:43 -0700)]
winsys/svga: fix display corruption after surface_init

When we initialize the buffer surface, do not map the existing storage
with DONTBLOCK, leave it as a synchronized map.
This patch also sets the surface rebind flag after it is bound to a
new buffer and sets the surface buffer pointer accordingly.

This fixes display corruption issue seen with running steam.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6415>

13 months agost/mesa: increase size of gl_register_file bitfields
Charmaine Lee [Fri, 21 Aug 2020 00:11:22 +0000 (17:11 -0700)]
st/mesa: increase size of gl_register_file bitfields

Bump up the size of the bitfields for gl_register_file type for MSVC.
Also add ASSERT_BITFIELD_SIZE check where this bitfield is used.

Fixes spec@arb_shader_atomic_counter_ops tests in MSVC.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6417>

13 months agonir: rename nir_op_fne to nir_op_fneu
Karol Herbst [Tue, 18 Aug 2020 17:51:57 +0000 (19:51 +0200)]
nir: rename nir_op_fne to nir_op_fneu

It was always fneu but naming it fne causes confusion from time to time. So
lets rename it. Later we also want to add other unordered and fne, this is
a smaller preparation for that.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6377>

13 months agobifrost: use nir_intrinsic_has_type
Rhys Perry [Thu, 20 Aug 2020 13:01:58 +0000 (14:01 +0100)]
bifrost: use nir_intrinsic_has_type

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6402>

13 months agoaco: use nir_intrinsic_has_access
Rhys Perry [Thu, 20 Aug 2020 13:01:36 +0000 (14:01 +0100)]
aco: use nir_intrinsic_has_access

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6402>

13 months agonir: add and use nir_intrinsic_has_ helpers
Rhys Perry [Thu, 20 Aug 2020 13:01:23 +0000 (14:01 +0100)]
nir: add and use nir_intrinsic_has_ helpers

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6402>

13 months agoaco: fix non-rtz pack_half_2x16
Rhys Perry [Mon, 17 Aug 2020 10:28:07 +0000 (11:28 +0100)]
aco: fix non-rtz pack_half_2x16

We were using the wrong conversion opcode. The high bits are also not
zero'd on GFX10, which can cause v_cvt_pk_u16_u32 to clamp.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: df645fa369d ('aco: implement VK_KHR_shader_float_controls')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6346>

13 months agoglsl: Eliminate out-of-bounds triop_vector_insert
Danylo Piliaiev [Tue, 18 Aug 2020 07:41:31 +0000 (10:41 +0300)]
glsl: Eliminate out-of-bounds triop_vector_insert

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

 "In the subsections described above for array, vector, matrix and
  structure accesses, any out-of-bounds access produced undefined
  behavior.... Out-of-bounds writes may be discarded or overwrite
  other variables of the active program."

Fixes crashes when dereferencing gl_ClipDistance and gl_TessLevel*, e.g:

  int index = -1;
  gl_ClipDistance[index] = -1;

When LowerCombinedClipCullDistance is true.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6363>

13 months agoglsl: Eliminate assigments to out-of-bounds elements of vector
Danylo Piliaiev [Mon, 17 Aug 2020 15:22:47 +0000 (18:22 +0300)]
glsl: Eliminate assigments to out-of-bounds elements of vector

Several optimization paths, including constant folding, can lead to
indexing vector with an out of bounds index.

Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds writes may be discarded or overwrite
 other variables of the active program."

Fixes piglit tests:
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-1
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-6

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6363>

13 months agoir_constant: Return zero on out-of-bounds vector accesses
Danylo Piliaiev [Mon, 17 Aug 2020 15:13:24 +0000 (18:13 +0300)]
ir_constant: Return zero on out-of-bounds vector accesses

Several optimization paths, including constant folding, can lead to
accessing an ir_constant vector with an out of bounds index.

Return 0 since GL_ARB_robustness and GL_KHR_robustness encourage
us to do so.

Fixes piglit tests:
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-2
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-4
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-5

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2604
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6363>

13 months agoanv: support fd==-1 in ImportSemaphoreFdKHR
Ricardo Quesada [Thu, 2 Jul 2020 13:46:11 +0000 (06:46 -0700)]
anv: support fd==-1 in ImportSemaphoreFdKHR

If fd==-1 is passed in ImportSemaphoreFdKHR, instead of importing the
fd, in creates an already signaled syncobj.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6427>

14 months agoaco: add ACO_DEBUG=force-waitcnt to emit wait-states
Samuel Pitoiset [Wed, 19 Aug 2020 08:40:35 +0000 (10:40 +0200)]
aco: add ACO_DEBUG=force-waitcnt to emit wait-states

Sounds useful for debugging missing wait-states and for improving
detection of the faulty instruction in case of memory violations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6386>

14 months agowgl: Switch to Win10 version defines to enable usage of Win10 WGL callbacks
Jesse Natalie [Tue, 17 Mar 2020 17:53:33 +0000 (10:53 -0700)]
wgl: Switch to Win10 version defines to enable usage of Win10 WGL callbacks

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6228>

14 months agoradv: ignore BB labels when splitting the disassembly string
Samuel Pitoiset [Wed, 19 Aug 2020 11:42:57 +0000 (13:42 +0200)]
radv: ignore BB labels when splitting the disassembly string

Ignore everything that is not an instruction. This should fix
the annotated UMR disassembly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6387>

14 months agoanv: take depth in to account in anv_GetImageSubresourceLayout
Tapani Pälli [Thu, 20 Aug 2020 09:49:46 +0000 (12:49 +0300)]
anv: take depth in to account in anv_GetImageSubresourceLayout

Fixes dEQP-VK.image.subresource_layout.3d* tests on gen9.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6400>

14 months agoiris: Add missing newline to debug log message
Caleb Callaway [Thu, 20 Aug 2020 00:12:10 +0000 (17:12 -0700)]
iris: Add missing newline to debug log message

Without this newline, log messages get lumped together on a single line,
making the debug log difficult to read.

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6413>

14 months agoci/freedreno: List more common flakes reported recently.
Eric Anholt [Wed, 19 Aug 2020 17:51:50 +0000 (10:51 -0700)]
ci/freedreno: List more common flakes reported recently.

Now that adding to our flakes list won't disturb the test order
(potentially just moving the flake to a different result), we can be more
aggressive in listing new flakes.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6392>

14 months agoci/freedreno: Move our skips lists over to being known-flakes lists.
Eric Anholt [Wed, 19 Aug 2020 17:43:54 +0000 (10:43 -0700)]
ci/freedreno: Move our skips lists over to being known-flakes lists.

This makes sure that we keep executing the tests so that we can get our
alerts in IRC and know whether the tests are still flaking.  It also keeps
us from having adjustments to the skip list causing failures/flakes to
move to different tests (as seen with a530 having to move some xfails
around after changing the skip list)

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6392>

14 months agoci/deqp-runner: Add a post-deqp-run filter list for known flakes.
Eric Anholt [Wed, 19 Aug 2020 17:30:12 +0000 (10:30 -0700)]
ci/deqp-runner: Add a post-deqp-run filter list for known flakes.

So far, we've been putting our known flakes that intermittently fail CI
into the skips list.  This has two downsides:

1) You don't know when the flakes stop happening and when to delist them
   from skips, unless you go do a bunch of manual runs with the skips list
   cleared.

2) If the flake was because the previous test left some broken state in
   the HW, you may just move your intermittent to a new test.

With this new path, you can list your flakes in the flakes file to keep
them from erroring out people's pipelines.  They still get run and
reported as is.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6392>

14 months agoci/deqp-runner: Drop unused "count" variable
Eric Anholt [Wed, 19 Aug 2020 17:17:17 +0000 (10:17 -0700)]
ci/deqp-runner: Drop unused "count" variable

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6392>

14 months agoci/deqp-runner: Drop stale comment from deqp-runner.sh.
Eric Anholt [Wed, 19 Aug 2020 17:15:12 +0000 (10:15 -0700)]
ci/deqp-runner: Drop stale comment from deqp-runner.sh.

We don't rerun to detect flakes ourselves any more since the runner does
it internally.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6392>

14 months agonir: Use 'unsigned' instead of enum types in nir_variable::data
Jesse Natalie [Wed, 19 Aug 2020 21:34:11 +0000 (14:34 -0700)]
nir: Use 'unsigned' instead of enum types in nir_variable::data

MSVC treats enums as signed, so storing values that use the topmost
bit of the explicitly sized field loads as a negative value instead.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6393>

14 months agonir: Add an LOD parameter to image_*_size
Jason Ekstrand [Wed, 19 Aug 2020 23:21:33 +0000 (18:21 -0500)]
nir: Add an LOD parameter to image_*_size

The OpenCL image_width/height/depth functions have variants which can
take an LOD parameter.  More importantly, LLVM-SPIRV-Translator always
generates OpImageQuerySizeLod even if the LOD is guaranteed to be zero.
Given that over half the hardware out there has an LOD field for image
size queries (based on a rudimentary scan through their NIR -> whatever
code), we may as well just add the source to the NIR intrinsic.  If this
is ever a problem for anyone, the lowering is pretty trivial.

I've also added asserts to everyone's drivers that should alert them if
they ever see an LOD other than zero.  This will never happen with GL or
Vulkan so there's no need for panic.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6396>

14 months agobroadcom/compiler: Enable PER_QUAD for UBO and SSBO loads.
Arcady Goldmints-Orlov [Mon, 10 Aug 2020 03:17:01 +0000 (22:17 -0500)]
broadcom/compiler: Enable PER_QUAD for UBO and SSBO loads.

Helper invocations need to be able to read from UBOs since those values
can be used for flow control, but writes from helper invocations need to
be dropped.

Fixes CTS tests:
  dEQP-VK.glsl.derivate.*.uniform_loop.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6356>

14 months agobroadcom/compiler: Add a constant folding pass after nir_lower_io
Arcady Goldmints-Orlov [Sat, 25 Jul 2020 15:39:31 +0000 (10:39 -0500)]
broadcom/compiler: Add a constant folding pass after nir_lower_io

The nir_lower_io pass produces a bunch of constant arithmetic, and
assumes that constant folding will simplify it away.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6356>

14 months agobroadcom/compiler: support nir_intrinsic_load_sample_id
Arcady Goldmints-Orlov [Sat, 25 Jul 2020 20:20:02 +0000 (15:20 -0500)]
broadcom/compiler: support nir_intrinsic_load_sample_id

This adds support for the intrinsic as well as the vir_SAMPID
instruction that corresponds to it in vir.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6356>

14 months agoclover/spirv: pass list of supported extensions to the translator
Karol Herbst [Sat, 15 Aug 2020 19:49:05 +0000 (21:49 +0200)]
clover/spirv: pass list of supported extensions to the translator

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5038>