mesa.git
4 years agodocs: Mark GLX_ARB_context_flush_control done
Adam Jackson [Mon, 6 Nov 2017 21:10:22 +0000 (16:10 -0500)]
docs: Mark GLX_ARB_context_flush_control done

Requires an unreleased X server, but from the client GLX side this is as
done as it gets.

Signed-off-by: Adam Jackson <ajax@redhat.com>
4 years agoi965: Enable flush control
Neil Roberts [Wed, 1 Oct 2014 19:00:50 +0000 (20:00 +0100)]
i965: Enable flush control

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
4 years agodrisw: Enable flush control for llvmpipe and softpipe
Adam Jackson [Wed, 4 Feb 2015 18:04:26 +0000 (13:04 -0500)]
drisw: Enable flush control for llvmpipe and softpipe

Hilariously this is a fairly big win.  Neil's multi-context-test
improves from ~24 to ~36 fps with llvmpipe on a Core i5-3317U.  softpipe
also improves, from about 2.25 to 3.09 fps (when it's that slow, you're
allowed to be that precise).

I'd have added it to swrast classic, but the testcase wants GL 3.0 and
shaders, and that's not a thing classic has, so I figured making it work
on softpipe was crime enough.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
4 years agogallium: Wire up flush control
Adam Jackson [Wed, 4 Feb 2015 18:05:36 +0000 (13:05 -0500)]
gallium: Wire up flush control

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
4 years agoegl: Implement EGL_KHR_context_flush_control
Adam Jackson [Thu, 22 Sep 2016 07:47:55 +0000 (03:47 -0400)]
egl: Implement EGL_KHR_context_flush_control

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
4 years agoglx: Implement GLX_ARB_context_flush_control
Neil Roberts [Wed, 1 Oct 2014 19:00:48 +0000 (20:00 +0100)]
glx: Implement GLX_ARB_context_flush_control

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
4 years agodri: Add a flush control extension
Neil Roberts [Wed, 1 Oct 2014 19:00:47 +0000 (20:00 +0100)]
dri: Add a flush control extension

This advertises that the driver can accept a new context attribute
__DRI_CTX_ATTRIB_RELEASE_BEHAVIOR.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
4 years agodri: Change __DriverApiRec::CreateContext to take a struct for attribs
Neil Roberts [Wed, 1 Oct 2014 19:00:46 +0000 (20:00 +0100)]
dri: Change __DriverApiRec::CreateContext to take a struct for attribs

Previously the CreateContext method of __DriverApiRec took a set of
arguments to describe the attribute values from the window system API's
CreateContextAttribs function. As more attributes get added this could
quickly get unworkable and every new attribute needs a modification for
every driver.

To fix that, pass the attribute values in a struct instead.  The struct
has a bitmask to specify which members are used. The first three members
(two for the GL version and one for the flags) are always set. If the
bit is not set in the attribute mask then it can be assumed the
attribute has the default value. Drivers will error if unknown bits in
the mask are set.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
4 years agointel: Don't flush the old context in intelMakeCurrent
Neil Roberts [Wed, 4 Feb 2015 15:20:12 +0000 (10:20 -0500)]
intel: Don't flush the old context in intelMakeCurrent

It shouldn't be necessary to flush the context within the driver
implementation because the old context is explicitly flushed in
_mesa_make_current which is called a little further on. It is useful to
only have a single place that flushes when switching contexts to make it
easier to later implement the GL_KHR_context_flush_control extension.

The flush in intelMakeCurrent was added in commit 5505865 to implement
the GLX semantics that the context should be flushed when it is
released.  When the commit was made there was no flush in
_mesa_make_current because it was only added later in 93102b4c. I think
that later commit effectively makes the first commit redundant.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
4 years agoegl/dri2: Factor out context attribute initialization
Adam Jackson [Thu, 22 Sep 2016 07:38:01 +0000 (03:38 -0400)]
egl/dri2: Factor out context attribute initialization

Signed-off-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
4 years agoetnaviv: Don't over-pad compressed textures
Wladimir J. van der Laan [Thu, 2 Nov 2017 15:08:42 +0000 (16:08 +0100)]
etnaviv: Don't over-pad compressed textures

HALIGN_FOUR/SIXTEEN has no meaning for compressed textures, and we can't
render to them anyway. So use the tightest possible packing. This
avoids bugs with non-power-of-two block sizes.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
4 years agoetnaviv: ASTC texture support
Wladimir J. van der Laan [Wed, 1 Nov 2017 17:19:02 +0000 (18:19 +0100)]
etnaviv: ASTC texture support

Add ASTC texture support for hardware that supports this
(currently only GC3000 on i.MX6qp is known to have this).

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
4 years agoetnaviv: Update from rnndb
Wladimir J. van der Laan [Wed, 1 Nov 2017 17:19:01 +0000 (18:19 +0100)]
etnaviv: Update from rnndb

Updated as of etnav_viv commit 3b4a8ec.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
4 years agoradv: add initial copy descriptor support. (v2)
Dave Airlie [Fri, 3 Nov 2017 04:06:35 +0000 (04:06 +0000)]
radv: add initial copy descriptor support. (v2)

It appears the latest dota2 vulkan uses this,
and we get a hang in VR mode without it.

v2: remove finishme I left in after finishing.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Cc: "17.2 17.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agogallium/u_vbuf: use signed vertex buffers offsets for optimal uploads
Marek Olšák [Thu, 26 Oct 2017 01:17:29 +0000 (03:17 +0200)]
gallium/u_vbuf: use signed vertex buffers offsets for optimal uploads

Uploaded data must start at (stride * start), because we can't modify
start in all cases. If it's the first allocation, it's also the amount
of memory wasted. If the starting offset is larger than the size of
the upload buffer, the buffer is re-created, used for 1 upload, and then
thrown away. If the upload is small, most of the buffer space is unused
and wasted. Keep doing that and the OOM killer comes. It's actually
pretty quick.

With signed VB offsets, we can set min_out_offset = 0
in u_upload_alloc/u_upload_data.

This fixes OOM situations with SPECviewperf.

4 years agoradeonsi: enable signed vertex buffer offsets
Marek Olšák [Wed, 25 Oct 2017 23:51:29 +0000 (01:51 +0200)]
radeonsi: enable signed vertex buffer offsets

4 years agogallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET
Marek Olšák [Wed, 25 Oct 2017 23:50:44 +0000 (01:50 +0200)]
gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET

4 years agoautomake: include git_sha1.h.in in release tarball
Juan A. Suarez Romero [Fri, 3 Nov 2017 17:54:21 +0000 (18:54 +0100)]
automake: include git_sha1.h.in in release tarball

Fixes:

make[2]: Leaving directory '/home/local/mesa/mesa-17.4.0-devel/_build/sub/src'
make[2]: *** No rule to make target '../../../src/git_sha1.h.in', needed by 'git_sha1.h'.  Stop.
Makefile:660: recipe for target 'all-recursive' failed

Fixes: 16be271c6ee618e79c7d "git_sha1_gen: use git_sha1.h.in on all build systems"
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
4 years agoradeonsi: don't map big VRAM buffers for the first upload directly
Marek Olšák [Wed, 1 Nov 2017 23:05:15 +0000 (00:05 +0100)]
radeonsi: don't map big VRAM buffers for the first upload directly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/u_threaded: don't map big VRAM buffers for the first upload directly
Marek Olšák [Wed, 1 Nov 2017 23:00:53 +0000 (00:00 +0100)]
gallium/u_threaded: don't map big VRAM buffers for the first upload directly

This improves Paraview "many spheres" performance 4x along with the radeonsi
commit.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agogallium/u_threaded: clean up tc_improve_map_buffer_flags and prevent reentry
Marek Olšák [Thu, 2 Nov 2017 00:06:43 +0000 (01:06 +0100)]
gallium/u_threaded: clean up tc_improve_map_buffer_flags and prevent reentry

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradv: move descriptor sets out of cmd_state.
Dave Airlie [Sun, 5 Nov 2017 23:37:47 +0000 (23:37 +0000)]
radv: move descriptor sets out of cmd_state.

Instead of storing all the pointers and zeroing them all out,
just store a valid bitmask in the state. This also moves
the CmdBindPipeline path down the cpu usage path for the
multithreading demo as it no longer has to traverse MAX_SETS
to find the active descriptor sets.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: add helper for setting a descriptor.
Dave Airlie [Sun, 5 Nov 2017 23:15:52 +0000 (23:15 +0000)]
radv: add helper for setting a descriptor.

This is just a simple refactor.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: move vertex binding out of cmd state.
Dave Airlie [Sun, 5 Nov 2017 23:17:09 +0000 (23:17 +0000)]
radv: move vertex binding out of cmd state.

This isn't required to be cleared, since buffers are only linked
by vertex elements, so if elements are clear then no buffers
should be referenced.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: reorder cmd_state to remove a hole.
Dave Airlie [Sun, 5 Nov 2017 23:40:05 +0000 (23:40 +0000)]
radv: reorder cmd_state to remove a hole.

This just removes a hole in the cmd_state and packs some bools
together.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: free attachments on end command buffer.
Dave Airlie [Mon, 6 Nov 2017 00:35:17 +0000 (00:35 +0000)]
radv: free attachments on end command buffer.

If we allocate attachments in the begin command buffer due to the
render pass continue bit, we were leaking them.

Since renderpasses inside a cmd buffer malloc/free these properly,
and set to NULL, we just need to call free at end.

Fixes a memory leak with multithreading demo.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2 17.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: Optimize calling radv_save_descriptors.
Bas Nieuwenhuizen [Fri, 3 Nov 2017 23:14:55 +0000 (00:14 +0100)]
radv: Optimize calling radv_save_descriptors.

uint32_t data[MAX_SETS * 2] = {}; was getting executed before
the exit and took significant amounts of time. By having the
check outside the function, we skip the execution of the clear.

Reviewed-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: Use an array to store descriptor sets.
Bas Nieuwenhuizen [Sat, 4 Nov 2017 14:19:02 +0000 (15:19 +0100)]
radv: Use an array to store descriptor sets.

The vram_list linked list resulted in lots of pointer chasing.
Replacing this with an array instead improves descriptor set
allocation CPU usage by 3x at least (when also considering the free),
because it had to iterate through 300-400 sets on average.

Not a huge improvement as the pre-improvement CPU usage was only
about 2.3% in the busiest thread.

Reviewed-by: Dave Airlie <airlied@redhat.com>
4 years agonv50,nvc0: Display shared memory usage in pipe_debug_message
Pierre Moreau [Mon, 2 Oct 2017 18:57:11 +0000 (20:57 +0200)]
nv50,nvc0: Display shared memory usage in pipe_debug_message

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
4 years agonv50,nvc0: Copy shared memory per block to the program info structure and back
Pierre Moreau [Mon, 2 Oct 2017 18:57:10 +0000 (20:57 +0200)]
nv50,nvc0: Copy shared memory per block to the program info structure and back

In OpenCL/CUDA kernels, shared memory usage can be defined within the
kernel code. Those usage will only be picked up while parsing the
SPIR-V, during the translation phase of the program.

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
4 years agonv50/ir: Store shared memory per block in nv50_ir_prog_info
Pierre Moreau [Mon, 2 Oct 2017 18:57:09 +0000 (20:57 +0200)]
nv50/ir: Store shared memory per block in nv50_ir_prog_info

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
4 years agoi965/gen10: Implement Wa3DStateMode
Anuj Phogat [Tue, 12 Sep 2017 23:05:06 +0000 (16:05 -0700)]
i965/gen10: Implement Wa3DStateMode

This workaround doesn't fix any of the piglit hangs we've seen
on CNL. But it might be fixing something we haven't tested yet.

V2: Remove the bits enabling Float blend optimization. It is
    enabled through CACHE_MODE_SS register.
    Update the comment.
    Move gen10 if block on top of gen9 if block.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
4 years agoi965/gen10: Enable float blend optimization
Anuj Phogat [Tue, 31 Oct 2017 16:28:09 +0000 (09:28 -0700)]
i965/gen10: Enable float blend optimization

This optimization is enabled for previous generations too.
See Mesa commit c17e214a6b
On CNL this bit has been moved to CACHE_MODE_SS register.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
4 years agoi965/gen10: Implement WaForceRCPFEHangWorkaround
Anuj Phogat [Mon, 11 Sep 2017 20:03:31 +0000 (13:03 -0700)]
i965/gen10: Implement WaForceRCPFEHangWorkaround

This workaround doesn't fix any of the piglit hangs we've seen
on CNL. But it might be fixing something we haven't tested yet.

V2: Add the check for Post Sync Operation.
    Update the workaround comment.
    Use braces around if-else.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
4 years agoi965/gen10: Implement WaSampleOffsetIZ workaround
Anuj Phogat [Sat, 9 Sep 2017 00:23:28 +0000 (17:23 -0700)]
i965/gen10: Implement WaSampleOffsetIZ workaround

There are few other (duplicate) workarounds which have similar recommendations:
WaFlushHangWhenNonPipelineStateAndMarkerStalled
WaCSStallBefore3DSamplePattern
WaPipeControlBefore3DStateSamplePattern

WaPipeControlBefore3DStateSamplePattern has some extra recommendations if
driver is using mid batch context restore. Ignoring it for now because We're
not doing mid-batch context restore in Mesa.

This workaround doesn't fix any of the piglit hangs we've seen
on CNL. But it might be fixing something we haven't tested yet.

V2: Use brw_load_register_imm32() to program CACHE_MODE_0.
    Get rid of brw_flush_gpu_caches().

V3: Make the workaround helper functions static.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by :Nanley Chery <nanley.g.chery@intel.com>

4 years agoi965/gen10: Don't set Antialiasing Enable in 3DSTATE_RASTER if num_samples > 1
Anuj Phogat [Thu, 26 Oct 2017 18:03:13 +0000 (11:03 -0700)]
i965/gen10: Don't set Antialiasing Enable in 3DSTATE_RASTER if num_samples > 1

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
4 years agoi965/gen10: Don't set Smooth Point Enable in 3DSTATE_SF if num_samples > 1
Anuj Phogat [Thu, 26 Oct 2017 18:02:36 +0000 (11:02 -0700)]
i965/gen10: Don't set Smooth Point Enable in 3DSTATE_SF if num_samples > 1

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
4 years agowinsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx.
Andrey Grodzovsky [Thu, 2 Nov 2017 14:50:39 +0000 (10:50 -0400)]
winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx.

Fixes reverted patch f03b7c9 by doing VMID reservation per
process and not per context.
Also updates required amdgpu libdrm version since the change
involved interface updates in amdgpu libdrm.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
4 years agoi965: perf: list registers to program for queries
Lionel Landwerlin [Tue, 25 Jul 2017 16:21:22 +0000 (17:21 +0100)]
i965: perf: list registers to program for queries

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
4 years agoi965: perf: factorize code for availability
Lionel Landwerlin [Tue, 25 Jul 2017 16:19:08 +0000 (17:19 +0100)]
i965: perf: factorize code for availability

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
4 years agoi965: perf: make revision variable available
Lionel Landwerlin [Tue, 25 Jul 2017 16:17:48 +0000 (17:17 +0100)]
i965: perf: make revision variable available

This will be used in the next commit to build up register programming.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
4 years agoglsl: fix interpolateAtXxx(some_vec[idx], ...) with dynamic idx
Nicolai Hähnle [Tue, 1 Aug 2017 10:44:34 +0000 (12:44 +0200)]
glsl: fix interpolateAtXxx(some_vec[idx], ...) with dynamic idx

The dynamic index of a vector (not array!) is lowered to a sequence of
conditional assignments. However, the interpolate_at_* expressions
require that the interpolant is an l-value of a shader input.

So instead of doing conditional assignments of parts of the shader input
and then interpolating that (which is nonsensical), we interpolate the
entire shader input and then do conditional assignments of the interpolated
result.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agoglsl: allow any l-value of an input variable as interpolant in interpolateAt*
Nicolai Hähnle [Wed, 14 Jun 2017 10:43:10 +0000 (12:43 +0200)]
glsl: allow any l-value of an input variable as interpolant in interpolateAt*

The intended rule has been clarified in GLSL 4.60, Section 8.13.2
(Interpolation Functions):

   "For all of the interpolation functions, interpolant must be an l-value
    from an in declaration; this can include a variable, a block or
    structure member, an array element, or some combination of these.
    Component selection operators (e.g., .xy) may be used when specifying
    interpolant."

For members of interface blocks, var->data.must_be_shader_input must be
determined on-the-fly after lowering interface blocks, since we don't want
to disable varying packing for an entire block just because one input in it
is used in interpolateAt*.

v2: keep setting must_be_shader_input in ast_function (Ian)
v3: follow the relaxed rule of GLSL 4.60
v4: only apply the relaxed rules to desktop GL
    (the ES WG decided that the relaxed rules may apply in a future version
     but not retroactively; see also
     dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_centroid.negative.*)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101378
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
4 years agonir/serialize: fix build with gcc 4.4.7
Dave Airlie [Fri, 3 Nov 2017 02:58:25 +0000 (12:58 +1000)]
nir/serialize: fix build with gcc 4.4.7

I had to build on RHEL6 today, and noticed this.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoi915g: remove some unknown cap warnings.
Dave Airlie [Fri, 26 May 2017 01:27:22 +0000 (11:27 +1000)]
i915g: remove some unknown cap warnings.

4 years agoi915g: make gears run again.
Dave Airlie [Fri, 26 May 2017 01:24:59 +0000 (11:24 +1000)]
i915g: make gears run again.

We need to validate some structs exist before we dirty the states, and
avoid the problem in some other places.

Fixes: e027935a7 ("st/mesa: don't update unrelated states in non-draw calls such as Clear")
4 years agoac: remove the remaining duplicate llvm types
Timothy Arceri [Thu, 2 Nov 2017 02:37:46 +0000 (13:37 +1100)]
ac: remove the remaining duplicate llvm types

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: remove usused v4f32
Timothy Arceri [Thu, 2 Nov 2017 02:34:13 +0000 (13:34 +1100)]
ac: remove usused v4f32

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: add v2f32 to the common code and make use of it
Timothy Arceri [Thu, 2 Nov 2017 02:24:27 +0000 (13:24 +1100)]
ac: add v2f32 to the common code and make use of it

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the ac f16 llvm type
Timothy Arceri [Thu, 2 Nov 2017 02:22:24 +0000 (13:22 +1100)]
ac: use the ac f16 llvm type

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the ac f32 llvm type
Timothy Arceri [Thu, 2 Nov 2017 02:19:52 +0000 (13:19 +1100)]
ac: use the ac f32 llvm type

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the ac f64 llvm type
Timothy Arceri [Thu, 2 Nov 2017 02:13:07 +0000 (13:13 +1100)]
ac: use the ac f64 llvm type

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the common v8i32 llvm type
Timothy Arceri [Thu, 2 Nov 2017 02:09:31 +0000 (13:09 +1100)]
ac: use the common v8i32 llvm type

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the common v4i32 llvm type
Timothy Arceri [Thu, 2 Nov 2017 02:06:20 +0000 (13:06 +1100)]
ac: use the common v4i32 llvm type

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: add v3i32 to the common code and make use of it
Timothy Arceri [Thu, 2 Nov 2017 02:02:54 +0000 (13:02 +1100)]
ac: add v3i32 to the common code and make use of it

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: add v2i32 to the common code and use it
Timothy Arceri [Thu, 2 Nov 2017 01:59:00 +0000 (12:59 +1100)]
ac: add v2i32 to the common code and use it

Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the ac i64 llvm type
Timothy Arceri [Thu, 2 Nov 2017 01:45:29 +0000 (12:45 +1100)]
ac: use the ac i64 llvm type

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: remove unused i16 llvm type
Timothy Arceri [Thu, 2 Nov 2017 01:44:08 +0000 (12:44 +1100)]
ac: remove unused i16 llvm type

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the ac ivoidt llvm type
Timothy Arceri [Thu, 2 Nov 2017 01:42:34 +0000 (12:42 +1100)]
ac: use the ac ivoidt llvm type

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the ac i8 llvm type
Timothy Arceri [Thu, 2 Nov 2017 01:41:09 +0000 (12:41 +1100)]
ac: use the ac i8 llvm type

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the ac i1 llvm type
Timothy Arceri [Thu, 2 Nov 2017 01:39:48 +0000 (12:39 +1100)]
ac: use the ac i1 llvm type

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac: use the ac i32 llvm type
Timothy Arceri [Thu, 2 Nov 2017 01:30:33 +0000 (12:30 +1100)]
ac: use the ac i32 llvm type

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoac/radeonsi: add support for tex instr without a derefence
Timothy Arceri [Wed, 1 Nov 2017 01:43:46 +0000 (12:43 +1100)]
ac/radeonsi: add support for tex instr without a derefence

These are produced by nir_lower_bitmap(), adding the missing derefence
would cause other issues that need to be hacked around such as
skipping sampler lowering and uniform location assignment, so this
change seems the correct way to go.

Fixes 194 piglit crashes on radeonsi using NIR.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agonir: skip lowering sampler if there is no dereference
Timothy Arceri [Wed, 1 Nov 2017 01:43:45 +0000 (12:43 +1100)]
nir: skip lowering sampler if there is no dereference

This avoids a crash on the output of nir_lower_bitmap().

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agor600: add support for early depth/stencil.
Dave Airlie [Thu, 31 Mar 2016 06:17:35 +0000 (16:17 +1000)]
r600: add support for early depth/stencil.

This add support for the early depth/stencil property found
on image shaders.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agor600: add support for emitting RAT instructions to the assembler.
Dave Airlie [Thu, 31 Mar 2016 06:06:37 +0000 (16:06 +1000)]
r600: add support for emitting RAT instructions to the assembler.

This adds support for emitting RAT instructions to the assembler.
RAT instructions are used to implement image accessors.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agor600: add support for mark bit to the assembler.
Dave Airlie [Thu, 31 Mar 2016 06:04:55 +0000 (16:04 +1000)]
r600: add support for mark bit to the assembler.

This adds support to the assembler for the mark bit
 on the export word1.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agor600: add support for valid pixel mode on CF clauses
Dave Airlie [Thu, 31 Mar 2016 05:56:40 +0000 (15:56 +1000)]
r600: add support for valid pixel mode on CF clauses

This just adds support to the assembler for setting the valid
pixel mode on the CF clause.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agor600: add support for some ALU sources.
Dave Airlie [Thu, 31 Mar 2016 05:52:52 +0000 (15:52 +1000)]
r600: add support for some ALU sources.

These special ALU sources provide the shader engine,
simd and hw wave ids.

These are required for images support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agoradv: use the optimal packets order for dispatch calls
Samuel Pitoiset [Tue, 31 Oct 2017 08:58:00 +0000 (09:58 +0100)]
radv: use the optimal packets order for dispatch calls

This should reduce the time where compute units are idle, mainly
for meta operations because they use a bunch of compute shaders.

This seems to have a really minor positive effect for Talos, at least.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agonir: add tess patch support to nir_remove_unused_varyings()
Timothy Arceri [Mon, 30 Oct 2017 04:11:10 +0000 (15:11 +1100)]
nir: add tess patch support to nir_remove_unused_varyings()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoes2api/ABI-check: Add es3.x symbols
Dylan Baker [Tue, 31 Oct 2017 18:49:07 +0000 (11:49 -0700)]
es2api/ABI-check: Add es3.x symbols

Currently this ABI check only checks for es2 symbols, but es3.x symbols
are also exposed. Exposing these symbols is recommended by Khronos, and
as such the test should accept that as ABI.

see: https://lists.freedesktop.org/archives/mesa-stable/2016-June/004545.html
for the discussion about exposing these symbols

cc: Ian Romanick <idr@freedesktop.org>
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
4 years agomeson: Set c visibility args for wayland-drm
Dylan Baker [Tue, 31 Oct 2017 18:04:27 +0000 (11:04 -0700)]
meson: Set c visibility args for wayland-drm

Because otherwise gbm will expose wayland symbols that it shouldn't.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-and-Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
4 years agost/glsl_to_nir: pass gl_shader_program to st_finalize_nir()
Timothy Arceri [Wed, 1 Nov 2017 05:20:36 +0000 (16:20 +1100)]
st/glsl_to_nir: pass gl_shader_program to st_finalize_nir()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agoradv: Don't expose heaps with 0 memory.
Bas Nieuwenhuizen [Wed, 1 Nov 2017 08:26:48 +0000 (09:26 +0100)]
radv: Don't expose heaps with 0 memory.

It confuses CTS. This pregenerates the heap info into the
physical device, so we can use it for translating contiguous
indices into our "standard" ones.

This also makes the WSI a bit smarter in case the first preferred
heap does not exist.

Reviewed-by: Dave Airlie <airlied@redhat.com>
CC: <mesa-stable@lists.freedesktop.org>
4 years agogbm: Don't traverse backwards for includes
Dylan Baker [Sat, 21 Oct 2017 00:49:42 +0000 (17:49 -0700)]
gbm: Don't traverse backwards for includes

This is just a bad idea and should be avoided. Instead, make the #include
flat and fix the build systems to pass the proper -I flags

v2: - add an inc_wayland_drm instead passing a path to
      include_directories (Emil)
    - update commit message (Emil)

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com> (v1)
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (v1)
4 years agoautomake: Remove unused include path
Dylan Baker [Sat, 21 Oct 2017 00:08:25 +0000 (17:08 -0700)]
automake: Remove unused include path

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
4 years agoradeonsi: remove 'Authors:' comments
Marek Olšák [Tue, 31 Oct 2017 17:45:18 +0000 (18:45 +0100)]
radeonsi: remove 'Authors:' comments

It's inaccurate. Instead, see the copyright and use "git log" and
"git blame" to know the authorship.

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
4 years agointel/fs: Don't allocate a param array for zero push constants
Jason Ekstrand [Wed, 1 Nov 2017 15:02:34 +0000 (08:02 -0700)]
intel/fs: Don't allocate a param array for zero push constants

Thanks to the ralloc invariant of "any pointer returned from ralloc can
be used as a context", calling ralloc_size with a size of zero will
cause it to allocate at least a header.  If we don't have any push
constants, then NULL is perfectly acceptable (and even preferred).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
4 years agointel/fs: Alloc pull constants off mem_ctx
Jason Ekstrand [Wed, 1 Nov 2017 14:57:21 +0000 (07:57 -0700)]
intel/fs: Alloc pull constants off mem_ctx

It doesn't actually matter since the only user of push constants, i965,
ralloc_steals it back to NULL but it's more consistent and probably
fixes memory leaks in some error cases.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
4 years agoRevert "meson: bump libdrm version required by amdgpu"
Dylan Baker [Wed, 1 Nov 2017 23:14:34 +0000 (16:14 -0700)]
Revert "meson: bump libdrm version required by amdgpu"

This reverts commit d364684711a5894fd3221191811d56713d6abdee.

The commit that bumped the autotools version was reverted, so lets
revert the meson version to match.

fixes: 1f2640bfa940362c7550cdd065d37555f21c8ae8
       "Revert "winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx.""
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
4 years agogallivm: allow arch rounding with avx512
Tim Rowley [Wed, 1 Nov 2017 18:22:47 +0000 (13:22 -0500)]
gallivm: allow arch rounding with avx512

Fixes piglit vs-roundeven-{float,vec[234]} with simd16 VS.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
4 years agoetnaviv: Allow clearing constant buffer using buffer==NULL user_buffer==NULL
Wladimir J. van der Laan [Sat, 28 Oct 2017 13:57:14 +0000 (15:57 +0200)]
etnaviv: Allow clearing constant buffer using buffer==NULL user_buffer==NULL

Prevents an assertion when using GALLIUM_HUD with ioquake3,
when cso_restore_constant_buffer_slot0 restores an empty
constant buffer in slot 0.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
4 years agoetnaviv: Don't flush on transfer when UNSYNCHRONIZED
Wladimir J. van der Laan [Sat, 28 Oct 2017 14:01:49 +0000 (16:01 +0200)]
etnaviv: Don't flush on transfer when UNSYNCHRONIZED

Structure code to only flush when we will potentially call cpu_prep. This
prevents spurious flushes in applications that heavily rely on u_uploader.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
4 years agoetnaviv: don't do resolve-in-place without valid TS
Wladimir J. van der Laan [Wed, 1 Nov 2017 10:17:53 +0000 (11:17 +0100)]
etnaviv: don't do resolve-in-place without valid TS

GC3000 resolve-in-place assumes that the TS state is configured.
If it is not, this will result in MMU errors. This is especially
apparent when using glGenMipmaps().

Fixes: 78ade659569e ("etnaviv: Do GC3000 resolve-in-place when possible")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
4 years agoradv: make radv_bind_descriptor_set() static
Samuel Pitoiset [Tue, 31 Oct 2017 09:29:47 +0000 (10:29 +0100)]
radv: make radv_bind_descriptor_set() static

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoradv: make sure we set buffers as shareable properly.
Dave Airlie [Wed, 1 Nov 2017 23:54:56 +0000 (23:54 +0000)]
radv: make sure we set buffers as shareable properly.

This should make sure we don't treat exports buffers as local
bos.

Fixes: a639d40f13 (radv: add support for local bos. (v3))
Tested-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
4 years agosvga: Use __asm__ instead of asm
Dylan Baker [Thu, 26 Oct 2017 22:32:09 +0000 (15:32 -0700)]
svga: Use __asm__ instead of asm

__asm__ is portable, and allows the svga driver to be compiled with the
c99 standard instead of requiring the gnu99 standard.

I have compile tested this with GCC and Clang on Linux.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>
4 years agoRevert "winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx."
Marek Olšák [Wed, 1 Nov 2017 20:42:11 +0000 (21:42 +0100)]
Revert "winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx."

This reverts commit f03b7c9ad92c1656a221297819fbc6d065cc0af7.

The libdrm interface is wrong.

4 years agointel: decoder: enable decoding a single field
Lionel Landwerlin [Sat, 30 Sep 2017 13:43:06 +0000 (14:43 +0100)]
intel: decoder: enable decoding a single field

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agointel: decoder: expose missing find_enum()
Lionel Landwerlin [Sat, 30 Sep 2017 13:41:20 +0000 (14:41 +0100)]
intel: decoder: expose missing find_enum()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agointel: decoder: extract field value computation
Lionel Landwerlin [Sat, 30 Sep 2017 12:48:36 +0000 (13:48 +0100)]
intel: decoder: extract field value computation

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agointel: decoder: rename field() to field_value()
Lionel Landwerlin [Sat, 30 Sep 2017 11:48:48 +0000 (12:48 +0100)]
intel: decoder: rename field() to field_value()

We would like to avoid collisions with variables named field.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agointel: decoder: rename internal function to free name
Lionel Landwerlin [Thu, 28 Sep 2017 01:37:20 +0000 (02:37 +0100)]
intel: decoder: rename internal function to free name

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agointel: decoder: simplify field_is_header()
Lionel Landwerlin [Thu, 28 Sep 2017 01:36:30 +0000 (02:36 +0100)]
intel: decoder: simplify field_is_header()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agointel: common: make intel utils available from C++
Lionel Landwerlin [Wed, 27 Sep 2017 19:57:28 +0000 (20:57 +0100)]
intel: common: make intel utils available from C++

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agointel: decoder: remove unused platform field
Lionel Landwerlin [Wed, 27 Sep 2017 17:57:58 +0000 (18:57 +0100)]
intel: decoder: remove unused platform field

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agointel: error-decode: implement a rolling window of programs
Lionel Landwerlin [Thu, 1 Jun 2017 14:23:38 +0000 (15:23 +0100)]
intel: error-decode: implement a rolling window of programs

If we have more programs than what we can store,
aubinator_error_decode will assert. Instead let's have a rolling
window of programs.

v2: Fix overflowing issues (Eric Engestrom)

v3: Go through programs starting at idx_program (Scott)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
4 years agogallium: increase pipe_sampler_view::target bitfield size for MSVC
Brian Paul [Wed, 1 Nov 2017 12:17:03 +0000 (06:17 -0600)]
gallium: increase pipe_sampler_view::target bitfield size for MSVC

MSVC treats enums as being signed.  The 4-bit target field isn't large
enough to correctly store the value 8 (for PIPE_TEXTURE_CUBE_ARRAY).
The bitfield value 0x8 was being interpreted as -8 so matching the
target with PIPE_TEXTURE_CUBE_ARRAY in switch statements, etc. was
failing.

To keep the structure size the same, we reduce the format field from
16 bits to 15.  There don't appear to be any other enum bitfields
which need to be adjusted.

This fixes a number of Piglit cube map array tests.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
4 years agomapi: fix .so path in ABI-check
Eric Engestrom [Tue, 31 Oct 2017 18:47:00 +0000 (18:47 +0000)]
mapi: fix .so path in ABI-check

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>