nir: Make image load/store intrinsics variable-width
authorJason Ekstrand <jason.ekstrand@intel.com>
Tue, 14 Aug 2018 19:03:05 +0000 (14:03 -0500)
committerJason Ekstrand <jason.ekstrand@intel.com>
Wed, 29 Aug 2018 19:04:02 +0000 (14:04 -0500)
commit15d39f474b89093507a80813d149c40461b8f355
tree0898b5f25a31037c16983d8f09e30ce425ef98d2
parent7cdf8f9339017ea5ee3c7f3a585c6bd5a815b99b
nir: Make image load/store intrinsics variable-width

Instead of requiring 4 components, this allows them to potentially use
fewer.  Both the SPIR-V and GLSL paths still generate vec4 intrinsics so
drivers which assume 4 components should be safe.  However, we want to
be able to shrink them for i965.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/compiler/glsl/glsl_to_nir.cpp
src/compiler/nir/nir_intrinsics.py
src/compiler/spirv/spirv_to_nir.c