From 519bebdb40d9df5926e8b16dedd36b8e0f356f60 Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Mon, 5 Aug 2019 15:11:41 +0200 Subject: [PATCH] radeonsi: limit DPBB context_states_per_bin batches when using gfx9 workaround MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit It seems that using 'context_states_per_bin = 1' for DPBB fixes the reported issue. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110214 Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_binning.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c index 157a38f88a0..a361ea253c3 100644 --- a/src/gallium/drivers/radeonsi/si_state_binning.c +++ b/src/gallium/drivers/radeonsi/si_state_binning.c @@ -563,7 +563,11 @@ void si_emit_dpbb_state(struct si_context *sctx) context_states_per_bin = 1; persistent_states_per_bin = 1; } else { - context_states_per_bin = 6; + /* This is a workaround for: + * https://bugs.freedesktop.org/show_bug.cgi?id=110214 + * (an alternative is to insert manual BATCH_BREAK event when + * a context_roll is detected). */ + context_states_per_bin = sctx->screen->has_gfx9_scissor_bug ? 1 : 6; /* Using 32 here can cause GPU hangs on RAVEN1 */ persistent_states_per_bin = 16; } -- 2.30.2