From a8f8c02e7eff7acf0c4dc8294526f137ceb39d42 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Fri, 17 Jul 2020 19:16:08 +0100 Subject: [PATCH] ac/nir: implement scoped_barrier MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Rhys Perry Reviewed-by: Daniel Schürmann Part-of: --- src/amd/llvm/ac_nir_to_llvm.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index 62b5d15a32b..ef6ab7cea92 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -3945,6 +3945,25 @@ static void visit_intrinsic(struct ac_nir_context *ctx, case nir_intrinsic_memory_barrier_shared: emit_membar(&ctx->ac, instr); break; + case nir_intrinsic_scoped_barrier: { + assert(!(nir_intrinsic_memory_semantics(instr) & + (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE))); + + nir_variable_mode modes = nir_intrinsic_memory_modes(instr); + + unsigned wait_flags = 0; + if (modes & (nir_var_mem_global | nir_var_mem_ssbo)) + wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE; + if (modes & nir_var_mem_shared) + wait_flags |= AC_WAIT_LGKM; + + if (wait_flags) + ac_build_waitcnt(&ctx->ac, wait_flags); + + if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP) + ac_emit_barrier(&ctx->ac, ctx->stage); + break; + } case nir_intrinsic_memory_barrier_tcs_patch: break; case nir_intrinsic_control_barrier: -- 2.30.2