From e4590c07500941ae1afa82db5e4fea2111a68604 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Tapani=20P=C3=A4lli?= Date: Mon, 1 Jun 2020 12:28:30 +0300 Subject: [PATCH] anv: depth/stencil dynamic state support MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit v2: code cleanup, remove extra spaces (Lionel) Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/anv_cmd_buffer.c | 118 +++++++++++++++++++++++++++++ src/intel/vulkan/anv_pipeline.c | 40 ++++++++++ src/intel/vulkan/anv_private.h | 20 +++++ src/intel/vulkan/gen7_cmd_buffer.c | 44 ++++++++++- src/intel/vulkan/gen8_cmd_buffer.c | 72 ++++++++++++++++-- 5 files changed, 286 insertions(+), 8 deletions(-) diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c index 0c73632a4a9..39c8ee013ce 100644 --- a/src/intel/vulkan/anv_cmd_buffer.c +++ b/src/intel/vulkan/anv_cmd_buffer.c @@ -72,6 +72,20 @@ const struct anv_dynamic_state default_dynamic_state = { .front = 0u, .back = 0u, }, + .stencil_op = { + .front = { + .fail_op = 0, + .pass_op = 0, + .depth_fail_op = 0, + .compare_op = 0, + }, + .back = { + .fail_op = 0, + .pass_op = 0, + .depth_fail_op = 0, + .compare_op = 0, + }, + }, .line_stipple = { .factor = 0u, .pattern = 0u, @@ -79,6 +93,11 @@ const struct anv_dynamic_state default_dynamic_state = { .cull_mode = 0, .front_face = 0, .primitive_topology = 0, + .depth_test_enable = 0, + .depth_write_enable = 0, + .depth_compare_op = 0, + .depth_bounds_test_enable = 0, + .stencil_test_enable = 0, }; /** @@ -147,6 +166,22 @@ anv_dynamic_state_copy(struct anv_dynamic_state *dest, ANV_CMP_COPY(cull_mode, ANV_CMD_DIRTY_DYNAMIC_CULL_MODE); ANV_CMP_COPY(front_face, ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE); ANV_CMP_COPY(primitive_topology, ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY); + ANV_CMP_COPY(depth_test_enable, ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE); + ANV_CMP_COPY(depth_write_enable, ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE); + ANV_CMP_COPY(depth_compare_op, ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP); + ANV_CMP_COPY(depth_bounds_test_enable, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE); + ANV_CMP_COPY(stencil_test_enable, ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE); + + if (copy_mask & VK_DYNAMIC_STATE_STENCIL_OP_EXT) { + ANV_CMP_COPY(stencil_op.front.fail_op, ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP); + ANV_CMP_COPY(stencil_op.front.pass_op, ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP); + ANV_CMP_COPY(stencil_op.front.depth_fail_op, ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP); + ANV_CMP_COPY(stencil_op.front.compare_op, ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP); + ANV_CMP_COPY(stencil_op.back.fail_op, ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP); + ANV_CMP_COPY(stencil_op.back.pass_op, ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP); + ANV_CMP_COPY(stencil_op.back.depth_fail_op, ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP); + ANV_CMP_COPY(stencil_op.back.compare_op, ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP); + } #undef ANV_CMP_COPY @@ -680,6 +715,89 @@ void anv_CmdSetFrontFaceEXT( cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_FRONT_FACE; } +void anv_CmdSetDepthTestEnableEXT( + VkCommandBuffer commandBuffer, + VkBool32 depthTestEnable) + +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.gfx.dynamic.depth_test_enable = depthTestEnable; + + cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE; +} + +void anv_CmdSetDepthWriteEnableEXT( + VkCommandBuffer commandBuffer, + VkBool32 depthWriteEnable) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.gfx.dynamic.depth_write_enable = depthWriteEnable; + + cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE; +} + +void anv_CmdSetDepthCompareOpEXT( + VkCommandBuffer commandBuffer, + VkCompareOp depthCompareOp) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.gfx.dynamic.depth_compare_op = depthCompareOp; + + cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP; +} + +void anv_CmdSetDepthBoundsTestEnableEXT( + VkCommandBuffer commandBuffer, + VkBool32 depthBoundsTestEnable) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.gfx.dynamic.depth_bounds_test_enable = depthBoundsTestEnable; + + cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE; +} + +void anv_CmdSetStencilTestEnableEXT( + VkCommandBuffer commandBuffer, + VkBool32 stencilTestEnable) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + cmd_buffer->state.gfx.dynamic.stencil_test_enable = stencilTestEnable; + + cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE; +} + +void anv_CmdSetStencilOpEXT( + VkCommandBuffer commandBuffer, + VkStencilFaceFlags faceMask, + VkStencilOp failOp, + VkStencilOp passOp, + VkStencilOp depthFailOp, + VkCompareOp compareOp) +{ + ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer); + + if (faceMask & VK_STENCIL_FACE_FRONT_BIT) { + cmd_buffer->state.gfx.dynamic.stencil_op.front.fail_op = failOp; + cmd_buffer->state.gfx.dynamic.stencil_op.front.pass_op = passOp; + cmd_buffer->state.gfx.dynamic.stencil_op.front.depth_fail_op = depthFailOp; + cmd_buffer->state.gfx.dynamic.stencil_op.front.compare_op = compareOp; + } + + if (faceMask & VK_STENCIL_FACE_BACK_BIT) { + cmd_buffer->state.gfx.dynamic.stencil_op.back.fail_op = failOp; + cmd_buffer->state.gfx.dynamic.stencil_op.back.pass_op = passOp; + cmd_buffer->state.gfx.dynamic.stencil_op.back.depth_fail_op = depthFailOp; + cmd_buffer->state.gfx.dynamic.stencil_op.back.compare_op = compareOp; + } + + cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP; +} + static void anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer, VkPipelineBindPoint bind_point, diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index ed666fd6485..bd2714f849b 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -1883,6 +1883,46 @@ copy_non_dynamic_state(struct anv_graphics_pipeline *pipeline, pCreateInfo->pRasterizationState->frontFace; } + if (states & ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE && + subpass->depth_stencil_attachment) { + dynamic->depth_test_enable = + pCreateInfo->pDepthStencilState->depthTestEnable; + } + + if (states & ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE && + subpass->depth_stencil_attachment) { + dynamic->depth_write_enable = + pCreateInfo->pDepthStencilState->depthWriteEnable; + } + + if (states & ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP && + subpass->depth_stencil_attachment) { + dynamic->depth_compare_op = + pCreateInfo->pDepthStencilState->depthCompareOp; + } + + if (states & ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE && + subpass->depth_stencil_attachment) { + dynamic->depth_bounds_test_enable = + pCreateInfo->pDepthStencilState->depthBoundsTestEnable; + } + + if (states & ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE && + subpass->depth_stencil_attachment) { + dynamic->stencil_test_enable = + pCreateInfo->pDepthStencilState->stencilTestEnable; + } + + if (states & ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP && + subpass->depth_stencil_attachment) { + const VkPipelineDepthStencilStateCreateInfo *info = + pCreateInfo->pDepthStencilState; + memcpy(&dynamic->stencil_op.front, &info->front, + sizeof(dynamic->stencil_op.front)); + memcpy(&dynamic->stencil_op.back, &info->back, + sizeof(dynamic->stencil_op.back)); + } + if (states & ANV_CMD_DIRTY_DYNAMIC_PRIMITIVE_TOPOLOGY) { assert(pCreateInfo->pInputAssemblyState); bool has_tess = false; diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index b26e2461db1..db1b9f28753 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -2684,6 +2684,21 @@ struct anv_dynamic_state { uint32_t back; } stencil_reference; + struct { + struct { + VkStencilOp fail_op; + VkStencilOp pass_op; + VkStencilOp depth_fail_op; + VkCompareOp compare_op; + } front; + struct { + VkStencilOp fail_op; + VkStencilOp pass_op; + VkStencilOp depth_fail_op; + VkCompareOp compare_op; + } back; + } stencil_op; + struct { uint32_t factor; uint16_t pattern; @@ -2692,6 +2707,11 @@ struct anv_dynamic_state { VkCullModeFlags cull_mode; VkFrontFace front_face; VkPrimitiveTopology primitive_topology; + bool depth_test_enable; + bool depth_write_enable; + VkCompareOp depth_compare_op; + bool depth_bounds_test_enable; + bool stencil_test_enable; }; extern const struct anv_dynamic_state default_dynamic_state; diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c index 076c2455563..1de47159db5 100644 --- a/src/intel/vulkan/gen7_cmd_buffer.c +++ b/src/intel/vulkan/gen7_cmd_buffer.c @@ -209,6 +209,28 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) [VK_FRONT_FACE_CLOCKWISE] = 0 }; + static const uint32_t vk_to_gen_compare_op[] = { + [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER, + [VK_COMPARE_OP_LESS] = PREFILTEROPLESS, + [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL, + [VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLEQUAL, + [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER, + [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL, + [VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGEQUAL, + [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS, + }; + + static const uint32_t vk_to_gen_stencil_op[] = { + [VK_STENCIL_OP_KEEP] = STENCILOP_KEEP, + [VK_STENCIL_OP_ZERO] = STENCILOP_ZERO, + [VK_STENCIL_OP_REPLACE] = STENCILOP_REPLACE, + [VK_STENCIL_OP_INCREMENT_AND_CLAMP] = STENCILOP_INCRSAT, + [VK_STENCIL_OP_DECREMENT_AND_CLAMP] = STENCILOP_DECRSAT, + [VK_STENCIL_OP_INVERT] = STENCILOP_INVERT, + [VK_STENCIL_OP_INCREMENT_AND_WRAP] = STENCILOP_INCR, + [VK_STENCIL_OP_DECREMENT_AND_WRAP] = STENCILOP_DECR, + }; + if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE | ANV_CMD_DIRTY_RENDER_TARGETS | ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH | @@ -264,7 +286,12 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE | ANV_CMD_DIRTY_RENDER_TARGETS | ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK | - ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) { + ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP | + ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP)) { uint32_t depth_stencil_dw[GENX(DEPTH_STENCIL_STATE_length)]; struct GENX(DEPTH_STENCIL_STATE) depth_stencil = { @@ -276,7 +303,20 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) .StencilBufferWriteEnable = (d->stencil_write_mask.front || d->stencil_write_mask.back) && - pipeline->writes_stencil, + d->stencil_test_enable, + + .DepthTestEnable = d->depth_test_enable, + .DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable, + .DepthTestFunction = vk_to_gen_compare_op[d->depth_compare_op], + .StencilTestEnable = d->stencil_test_enable, + .StencilFailOp = vk_to_gen_stencil_op[d->stencil_op.front.fail_op], + .StencilPassDepthPassOp = vk_to_gen_stencil_op[d->stencil_op.front.pass_op], + .StencilPassDepthFailOp = vk_to_gen_stencil_op[d->stencil_op.front.depth_fail_op], + .StencilTestFunction = vk_to_gen_compare_op[d->stencil_op.front.compare_op], + .BackfaceStencilFailOp = vk_to_gen_stencil_op[d->stencil_op.back.fail_op], + .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[d->stencil_op.back.pass_op], + .BackfaceStencilPassDepthFailOp = vk_to_gen_stencil_op[d->stencil_op.back.depth_fail_op], + .BackfaceStencilTestFunction = vk_to_gen_compare_op[d->stencil_op.back.compare_op], }; GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil); diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c index 2fbc313131e..92aa2b6d8c4 100644 --- a/src/intel/vulkan/gen8_cmd_buffer.c +++ b/src/intel/vulkan/gen8_cmd_buffer.c @@ -462,6 +462,28 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) [VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY] = _3DPRIM_TRISTRIP_ADJ, }; + static const uint32_t vk_to_gen_compare_op[] = { + [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER, + [VK_COMPARE_OP_LESS] = PREFILTEROPLESS, + [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL, + [VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLEQUAL, + [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER, + [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL, + [VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGEQUAL, + [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS, + }; + + static const uint32_t vk_to_gen_stencil_op[] = { + [VK_STENCIL_OP_KEEP] = STENCILOP_KEEP, + [VK_STENCIL_OP_ZERO] = STENCILOP_ZERO, + [VK_STENCIL_OP_REPLACE] = STENCILOP_REPLACE, + [VK_STENCIL_OP_INCREMENT_AND_CLAMP] = STENCILOP_INCRSAT, + [VK_STENCIL_OP_DECREMENT_AND_CLAMP] = STENCILOP_DECRSAT, + [VK_STENCIL_OP_INVERT] = STENCILOP_INVERT, + [VK_STENCIL_OP_INCREMENT_AND_WRAP] = STENCILOP_INCR, + [VK_STENCIL_OP_DECREMENT_AND_WRAP] = STENCILOP_DECR, + }; + if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE | ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS | ANV_CMD_DIRTY_DYNAMIC_CULL_MODE | @@ -511,7 +533,12 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) if (cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE | ANV_CMD_DIRTY_RENDER_TARGETS | ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK | - ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK)) { + ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP | + ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP)) { uint32_t wm_depth_stencil_dw[GENX(3DSTATE_WM_DEPTH_STENCIL_length)]; struct GENX(3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil) = { @@ -525,7 +552,20 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) .StencilBufferWriteEnable = (d->stencil_write_mask.front || d->stencil_write_mask.back) && - pipeline->writes_stencil, + d->stencil_test_enable, + + .DepthTestEnable = d->depth_test_enable, + .DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable, + .DepthTestFunction = vk_to_gen_compare_op[d->depth_compare_op], + .StencilTestEnable = d->stencil_test_enable, + .StencilFailOp = vk_to_gen_stencil_op[d->stencil_op.front.fail_op], + .StencilPassDepthPassOp = vk_to_gen_stencil_op[d->stencil_op.front.pass_op], + .StencilPassDepthFailOp = vk_to_gen_stencil_op[d->stencil_op.front.depth_fail_op], + .StencilTestFunction = vk_to_gen_compare_op[d->stencil_op.front.compare_op], + .BackfaceStencilFailOp = vk_to_gen_stencil_op[d->stencil_op.back.fail_op], + .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[d->stencil_op.back.pass_op], + .BackfaceStencilPassDepthFailOp = vk_to_gen_stencil_op[d->stencil_op.back.depth_fail_op], + .BackfaceStencilTestFunction = vk_to_gen_compare_op[d->stencil_op.back.compare_op], }; GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, wm_depth_stencil_dw, &wm_depth_stencil); @@ -560,7 +600,12 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) ANV_CMD_DIRTY_RENDER_TARGETS | ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK | ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK | - ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) { + ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_TEST_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_WRITE_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP | + ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE | + ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP)) { uint32_t dwords[GENX(3DSTATE_WM_DEPTH_STENCIL_length)]; struct GENX(3DSTATE_WM_DEPTH_STENCIL) wm_depth_stencil = { GENX(3DSTATE_WM_DEPTH_STENCIL_header), @@ -576,7 +621,21 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) .StencilBufferWriteEnable = (d->stencil_write_mask.front || d->stencil_write_mask.back) && - pipeline->writes_stencil, + d->stencil_test_enable, + + .DepthTestEnable = d->depth_test_enable, + .DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable, + .DepthTestFunction = vk_to_gen_compare_op[d->depth_compare_op], + .StencilTestEnable = d->stencil_test_enable, + .StencilFailOp = vk_to_gen_stencil_op[d->stencil_op.front.fail_op], + .StencilPassDepthPassOp = vk_to_gen_stencil_op[d->stencil_op.front.pass_op], + .StencilPassDepthFailOp = vk_to_gen_stencil_op[d->stencil_op.front.depth_fail_op], + .StencilTestFunction = vk_to_gen_compare_op[d->stencil_op.front.compare_op], + .BackfaceStencilFailOp = vk_to_gen_stencil_op[d->stencil_op.back.fail_op], + .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[d->stencil_op.back.pass_op], + .BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[d->stencil_op.back.depth_fail_op], + .BackfaceStencilTestFunction = vk_to_gen_compare_op[d->stencil_op.back.compare_op], + }; GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, dwords, &wm_depth_stencil); @@ -590,11 +649,12 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer) #if GEN_GEN >= 12 if(cmd_buffer->state.gfx.dirty & (ANV_CMD_DIRTY_PIPELINE | - ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS)) { + ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS | + ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS_TEST_ENABLE)) { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DEPTH_BOUNDS), db) { db.DepthBoundsTestValueModifyDisable = false; db.DepthBoundsTestEnableModifyDisable = false; - db.DepthBoundsTestEnable = pipeline->depth_bounds_test_enable; + db.DepthBoundsTestEnable = d->depth_bounds_test_enable; db.DepthBoundsTestMinValue = d->depth_bounds.min; db.DepthBoundsTestMaxValue = d->depth_bounds.max; } -- 2.30.2