more whitespace cleanup

[nmigen-soc.git] / nmigen_soc / wishbone / sram.py

diff --git a/nmigen_soc/wishbone/sram.py b/nmigen_soc/wishbone/sram.py
index c5a139df41f1533ea40a63bfff1d78017afd55a9..ac5f12b32837f30900471ee01b227248d56f74c8 100644 (file)
--- a/nmigen_soc/wishbone/sram.py
+++ b/nmigen_soc/wishbone/sram.py
@@ -53,7 +53,8 @@ class SRAM(Elaboratable):
         self.memory = memory
         self.read_only = read_only
         if bus is None:
         self.memory = memory
         self.read_only = read_only
         if bus is None:

-            bus = Interface(addr_width=log2_int(self.memory.depth, need_pow2=False),
+            bus = Interface(addr_width=log2_int(self.memory.depth,
+                                                need_pow2=False),

                             data_width=self.memory.width,
                             granularity=granularity,
                             features=features,
                             data_width=self.memory.width,
                             granularity=granularity,
                             features=features,