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fix nmigen imports
[nmigen-soc.git]
/
nmigen_soc
/
wishbone
/
sram.py
diff --git
a/nmigen_soc/wishbone/sram.py
b/nmigen_soc/wishbone/sram.py
index ac5f12b32837f30900471ee01b227248d56f74c8..f6734b2ef40c6407867d44df2caa8991619e1b05 100644
(file)
--- a/
nmigen_soc/wishbone/sram.py
+++ b/
nmigen_soc/wishbone/sram.py
@@
-1,5
+1,5
@@
-from nmigen import
*
-from nmigen.utils import
*
+from nmigen import
Elaboratable, Memory, Module
+from nmigen.utils import
log2_int
from .bus import Interface