git.libre-soc.org Git - nmigen-soc.git/commit

author	whitequark <whitequark@whitequark.org>
	Fri, 25 Oct 2019 21:30:46 +0000 (21:30 +0000)
committer	whitequark <whitequark@whitequark.org>
	Fri, 25 Oct 2019 21:30:56 +0000 (21:30 +0000)
commit	7d76126fecd25d4242e64f14728041f760c4fac3
tree	404833f8dfb456de1bbce8d83d049245022a2380	tree
parent	2a634b3a43739d024ff1f57c1d35aa891a47e3dc	commit \| diff

csr.bus.{Multiplexer↔Decoder}

This reverses the rename done in commit 5520e0d7. Commit 2a634b3a
introduced a Multiplexer that doesn't actually do multiplexing, so
revert that to make everything less confusing.

nmigen_soc/csr/bus.py		diff \| blob \| history
nmigen_soc/test/test_csr_bus.py		diff \| blob \| history

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