wishbone: fix that RoundRobin might assert CYC indefinitely
authorHarry Ho <hh@m-labs.hk>
Wed, 29 Jan 2020 04:14:11 +0000 (12:14 +0800)
committerHarry Ho <hh@m-labs.hk>
Wed, 29 Jan 2020 07:13:26 +0000 (15:13 +0800)
commit976cef46fd5c2661eb22262dc135ebfa38097883
treeabc6b796b82e5e16a9d9e8a5fb63d96461abbbc0
parentad14cd097e58f8d73b53c13c36bdbe3299f249ad
wishbone: fix that RoundRobin might assert CYC indefinitely
nmigen_soc/scheduler.py
nmigen_soc/wishbone/bus.py