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must not delay ack to wb request in SRAM
[nmigen-soc.git]
/
nmigen_soc
/
csr
/ bus.py
2020-06-20
Luke Kenneth Casso...
resolve internal (nmigen_soc) imports
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commitdiff
2020-06-20
Luke Kenneth Casso...
fix nmigen imports
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commitdiff
2020-06-19
Luke Kenneth Casso...
more whitespace cleanup
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commitdiff
2020-06-19
Luke Kenneth Casso...
comment cleanup
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2020-06-19
Luke Kenneth Casso...
autopep8 cleanup
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2020-06-19
Luke Kenneth Casso...
whitespace cleanup
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commitdiff
2019-10-26
whitequark
wishbone.bus: add Decoder.
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2019-10-26
whitequark
memory: add Memory.window_patterns(), to simplify decoders.
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commitdiff
2019-10-26
whitequark
csr.wishbone: add WishboneCSRBridge.
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2019-10-26
whitequark
csr.bus.Multiplexer: fix element w_stb getting stuck.
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commitdiff
2019-10-25
whitequark
wishbone.bus: add Interface.
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commitdiff
2019-10-25
whitequark
csr.bus.{Multiplexer↔Decoder}
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commitdiff
2019-10-25
whitequark
csr.bus: add Multiplexer.
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2019-10-25
whitequark
csr.bus: rewrite using the MemoryMap abstraction.
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2019-10-25
whitequark
csr.bus: use proper enum instead of ad-hoc string enume...
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2019-10-25
whitequark
csr.bus: drop CSR prefix from class names.
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2019-10-25
whitequark
csr.bus: split CSRMultiplexer to CSRInterface+CSRDecoder.
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2019-10-22
whitequark
csr.bus: improve comments/docs. NFC.
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commitdiff
2019-10-21
whitequark
csr.bus: add CSRElement and CSRMultiplexer.
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