must not delay ack to wb request in SRAM
[nmigen-soc.git] / nmigen_soc / csr / bus.py
2020-06-20 Luke Kenneth Casso... resolve internal (nmigen_soc) imports
2020-06-20 Luke Kenneth Casso... fix nmigen imports
2020-06-19 Luke Kenneth Casso... more whitespace cleanup
2020-06-19 Luke Kenneth Casso... comment cleanup
2020-06-19 Luke Kenneth Casso... autopep8 cleanup
2020-06-19 Luke Kenneth Casso... whitespace cleanup
2019-10-26 whitequarkwishbone.bus: add Decoder.
2019-10-26 whitequarkmemory: add Memory.window_patterns(), to simplify decoders.
2019-10-26 whitequarkcsr.wishbone: add WishboneCSRBridge.
2019-10-26 whitequarkcsr.bus.Multiplexer: fix element w_stb getting stuck.
2019-10-25 whitequarkwishbone.bus: add Interface.
2019-10-25 whitequarkcsr.bus.{Multiplexer↔Decoder}
2019-10-25 whitequarkcsr.bus: add Multiplexer.
2019-10-25 whitequarkcsr.bus: rewrite using the MemoryMap abstraction.
2019-10-25 whitequarkcsr.bus: use proper enum instead of ad-hoc string enume...
2019-10-25 whitequarkcsr.bus: drop CSR prefix from class names.
2019-10-25 whitequarkcsr.bus: split CSRMultiplexer to CSRInterface+CSRDecoder.
2019-10-22 whitequarkcsr.bus: improve comments/docs. NFC.
2019-10-21 whitequarkcsr.bus: add CSRElement and CSRMultiplexer.