3 from nmutil
.formaltest
import FHDLTestCase
4 from openpower
.decoder
.isa
.test_caller
import run_tst
5 from openpower
.decoder
.selectable_int
import SelectableInt
6 from openpower
.simulator
.program
import Program
9 class DecoderTestCase(FHDLTestCase
):
11 def _check_regs(self
, sim
, expected_int
, expected_fpr
):
13 self
.assertEqual(sim
.gpr(i
), SelectableInt(expected
[i
], 64))
15 self
.assertEqual(sim
.fpr(i
), SelectableInt(expected_fpr
[i
], 64))
17 def test_fpload(self
):
18 """>>> lst = ["lfsx 1, 0, 0",
21 lst
= ["lfsx 1, 0, 0",
23 initial_mem
= {0x0000: (0x42013333, 8),
24 0x0008: (0x42026666, 8),
25 0x0020: (0x1828384822324252, 8),
28 with
Program(lst
, bigendian
=False) as program
:
29 sim
= self
.run_tst_program(program
, initial_mem
=initial_mem
)
30 print("FPR 1", sim
.fpr(1))
31 self
.assertEqual(sim
.fpr(1), SelectableInt(0x4040266660000000, 64))
33 def test_fpload_imm(self
):
34 """>>> lst = ["lfs 1, 8(1)",
39 initial_mem
= {0x0000: (0x42013333, 8),
40 0x0008: (0x42026666, 8),
41 0x0020: (0x1828384822324252, 8),
44 with
Program(lst
, bigendian
=False) as program
:
45 sim
= self
.run_tst_program(program
, initial_mem
=initial_mem
)
46 print("FPR 1", sim
.fpr(1))
47 self
.assertEqual(sim
.fpr(1), SelectableInt(0x40404cccc0000000, 64))
49 def test_fpload2(self
):
50 """>>> lst = ["lfsx 1, 0, 0",
53 lst
= ["lfsx 1, 0, 0",
55 initial_mem
= {0x0000: (0xac000000, 8),
56 0x0020: (0x1828384822324252, 8),
59 with
Program(lst
, bigendian
=False) as program
:
60 sim
= self
.run_tst_program(program
, initial_mem
=initial_mem
)
61 print("FPR 1", sim
.fpr(1))
62 self
.assertEqual(sim
.fpr(1), SelectableInt(0xbd80000000000000, 64))
64 def test_fp_single_ldst(self
):
65 """>>> lst = ["lfsx 1, 1, 0", # load fp 1 from mem location 0
66 "stfsu 1, 16(1)", # store fp 1 into mem 0x10, update RA
67 "lfs 2, 0(1)", # re-load from UPDATED r1
70 lst
= ["lfsx 1, 1, 0",
74 initial_mem
= {0x0000: (0x42013333, 8),
75 0x0008: (0x42026666, 8),
76 0x0020: (0x1828384822324252, 8),
79 with
Program(lst
, bigendian
=False) as program
:
80 sim
= self
.run_tst_program(program
, initial_mem
=initial_mem
)
81 print("FPR 1", sim
.fpr(1))
82 print("FPR 2", sim
.fpr(2))
83 print("GPR 1", sim
.gpr(1)) # should be 0x10 due to update
84 self
.assertEqual(sim
.gpr(1), SelectableInt(0x10, 64))
85 self
.assertEqual(sim
.fpr(1), SelectableInt(0x4040266660000000, 64))
86 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
88 def test_fp_single_ldst_update_idx(self
):
89 """>>> lst = ["lfsx 1, 0, 0", # load fp 1 from mem location 0
90 "stfsux 1, 2, 1", # store fp 1 into mem 0x10, update RA
91 "lfs 2, 0(2)", # re-load from UPDATED r2
94 lst
= ["lfsx 1, 0, 0",
98 initial_mem
= {0x0000: (0x42013333, 8),
99 0x0008: (0x42026666, 8),
100 0x0020: (0x1828384822324252, 8),
102 # create an offset of 0x10 (2+3)
103 initial_regs
= [0]*32
104 initial_regs
[1] = 0x4
105 initial_regs
[2] = 0xc
107 with
Program(lst
, bigendian
=False) as program
:
108 sim
= self
.run_tst_program(program
, initial_regs
=initial_regs
,
109 initial_mem
=initial_mem
)
110 print("FPR 1", sim
.fpr(1))
111 print("FPR 2", sim
.fpr(2))
112 print("GPR 1", sim
.gpr(1)) # should be 0x4
113 print("GPR 2", sim
.gpr(2)) # should be 0x10 due to update
115 print(sim
.mem
.dump())
116 self
.assertEqual(sim
.gpr(1), SelectableInt(0x4, 64))
117 self
.assertEqual(sim
.gpr(2), SelectableInt(0x10, 64))
118 self
.assertEqual(sim
.fpr(1), SelectableInt(0x4040266660000000, 64))
119 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
121 def test_fp_single_ldst_idx(self
):
122 """>>> lst = ["lfsx 1, 0, 0", # load fp 1 from mem location 0
123 "stfsx 1, 2, 1", # store fp 1 into mem 0x10, no update
124 "lfs 2, 4(2)", # re-load from NOT updated r2
127 lst
= ["lfsx 1, 0, 0",
131 initial_mem
= {0x0000: (0x42013333, 8),
132 0x0008: (0x42026666, 8),
133 0x0020: (0x1828384822324252, 8),
135 # create an offset of 0x10 (2+3)
136 initial_regs
= [0]*32
137 initial_regs
[1] = 0x4
138 initial_regs
[2] = 0xc
140 with
Program(lst
, bigendian
=False) as program
:
141 sim
= self
.run_tst_program(program
, initial_regs
=initial_regs
,
142 initial_mem
=initial_mem
)
143 print("FPR 1", sim
.fpr(1))
144 print("FPR 2", sim
.fpr(2))
145 print("GPR 1", sim
.gpr(1)) # should be 0x4
146 print("GPR 2", sim
.gpr(2)) # should be 0xc (no update)
148 print(sim
.mem
.dump())
149 self
.assertEqual(sim
.gpr(1), SelectableInt(0x4, 64))
150 self
.assertEqual(sim
.gpr(2), SelectableInt(0xc, 64))
151 self
.assertEqual(sim
.fpr(1), SelectableInt(0x4040266660000000, 64))
152 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
154 def test_fp_single_ldst_2(self
):
155 """>>> lst = ["lfsx 1, 0, 0", # load fp 1 from mem location 0
156 "stfs 1, 4(2)", # store fp 1 into mem 0x10, no update
157 "lfs 2, 4(2)", # re-load from NOT updated r2
160 lst
= ["lfsx 1, 0, 0",
164 initial_mem
= {0x0000: (0x42013333, 8),
165 0x0008: (0x42026666, 8),
166 0x0020: (0x1828384822324252, 8),
168 # create an offset of 0x10 (2+3)
169 initial_regs
= [0]*32
170 initial_regs
[1] = 0x4
171 initial_regs
[2] = 0xc
173 with
Program(lst
, bigendian
=False) as program
:
174 sim
= self
.run_tst_program(program
, initial_regs
=initial_regs
,
175 initial_mem
=initial_mem
)
176 print("FPR 1", sim
.fpr(1))
177 print("FPR 2", sim
.fpr(2))
178 print("GPR 1", sim
.gpr(1)) # should be 0x4
179 print("GPR 2", sim
.gpr(2)) # should be 0xc (no update)
181 print(sim
.mem
.dump())
182 self
.assertEqual(sim
.gpr(1), SelectableInt(0x4, 64))
183 self
.assertEqual(sim
.gpr(2), SelectableInt(0xc, 64))
184 self
.assertEqual(sim
.fpr(1), SelectableInt(0x4040266660000000, 64))
185 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
187 def test_fp_mv(self
):
188 """>>> lst = ["fmr 1, 2",
195 fprs
[2] = 0x4040266660000000
197 with
Program(lst
, bigendian
=False) as program
:
198 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
199 print("FPR 1", sim
.fpr(1))
200 print("FPR 2", sim
.fpr(2))
201 self
.assertEqual(sim
.fpr(1), SelectableInt(0x4040266660000000, 64))
202 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
204 def test_fp_neg(self
):
205 """>>> lst = ["fneg 1, 2",
212 fprs
[2] = 0x4040266660000000
214 with
Program(lst
, bigendian
=False) as program
:
215 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
216 print("FPR 1", sim
.fpr(1))
217 print("FPR 2", sim
.fpr(2))
218 self
.assertEqual(sim
.fpr(1), SelectableInt(0xC040266660000000, 64))
219 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
221 def test_fp_abs(self
):
222 """>>> lst = ["fabs 3, 1",
235 fprs
[1] = 0xC040266660000000
236 fprs
[2] = 0x4040266660000000
238 with
Program(lst
, bigendian
=False) as program
:
239 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
240 self
.assertEqual(sim
.fpr(1), SelectableInt(0xC040266660000000, 64))
241 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
242 self
.assertEqual(sim
.fpr(3), SelectableInt(0x4040266660000000, 64))
243 self
.assertEqual(sim
.fpr(4), SelectableInt(0x4040266660000000, 64))
244 self
.assertEqual(sim
.fpr(5), SelectableInt(0xC040266660000000, 64))
245 self
.assertEqual(sim
.fpr(6), SelectableInt(0xC040266660000000, 64))
247 def test_fp_sgn(self
):
248 """>>> lst = ["fcpsgn 3, 1, 2",
252 lst
= ["fcpsgn 3, 1, 2",
257 fprs
[1] = 0xC040266660000001 # 1 in LSB, 1 in MSB
258 fprs
[2] = 0x4040266660000000 # 0 in LSB, 0 in MSB
260 with
Program(lst
, bigendian
=False) as program
:
261 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
262 self
.assertEqual(sim
.fpr(1), SelectableInt(0xC040266660000001, 64))
263 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
264 # 1 in MSB comes from reg 1, 0 in LSB comes from reg 2
265 self
.assertEqual(sim
.fpr(3), SelectableInt(0xC040266660000000, 64))
266 # 0 in MSB comes from reg 2, 1 in LSB comes from reg 1
267 self
.assertEqual(sim
.fpr(4), SelectableInt(0x4040266660000001, 64))
269 def test_fp_adds(self
):
270 """>>> lst = ["fadds 3, 1, 2",
273 lst
= ["fadds 3, 1, 2", # -32.3 + 32.3 = 0
277 fprs
[1] = 0xC040266660000000
278 fprs
[2] = 0x4040266660000000
280 with
Program(lst
, bigendian
=False) as program
:
281 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
282 self
.assertEqual(sim
.fpr(1), SelectableInt(0xC040266660000000, 64))
283 self
.assertEqual(sim
.fpr(2), SelectableInt(0x4040266660000000, 64))
284 self
.assertEqual(sim
.fpr(3), SelectableInt(0, 64))
286 def test_fp_subs(self
):
287 """>>> lst = ["fsubs 3, 1, 2",
290 lst
= ["fsubs 3, 1, 2", # 0 - -32.3 = 32.3
295 fprs
[2] = 0xC040266660000000
297 with
Program(lst
, bigendian
=False) as program
:
298 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
299 self
.assertEqual(sim
.fpr(1), SelectableInt(0x0, 64))
300 self
.assertEqual(sim
.fpr(2), SelectableInt(0xC040266660000000, 64))
301 self
.assertEqual(sim
.fpr(3), SelectableInt(0x4040266660000000, 64))
303 def test_fp_add(self
):
304 """>>> lst = ["fadd 3, 1, 2",
307 lst
= ["fadd 3, 1, 2", # 7.0 + -9.8 = -2.8
311 fprs
[1] = 0x401C000000000000 # 7.0
312 fprs
[2] = 0xC02399999999999A # -9.8
314 with
Program(lst
, bigendian
=False) as program
:
315 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
316 self
.assertEqual(sim
.fpr(1), SelectableInt(0x401C000000000000, 64))
317 self
.assertEqual(sim
.fpr(2), SelectableInt(0xC02399999999999A, 64))
318 self
.assertEqual(sim
.fpr(3), SelectableInt(0xC006666666666668, 64))
320 def test_fp_muls(self
):
321 """>>> lst = ["fmuls 3, 1, 2",
324 lst
= ["fmuls 3, 1, 2", # 7.0 * -9.8 = -68.6
325 "fmuls 29,12,8", # test
329 fprs
[1] = 0x401C000000000000 # 7.0
330 fprs
[2] = 0xC02399999999999A # -9.8
332 with
Program(lst
, bigendian
=False) as program
:
333 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
334 self
.assertEqual(sim
.fpr(1), SelectableInt(0x401C000000000000, 64))
335 self
.assertEqual(sim
.fpr(2), SelectableInt(0xC02399999999999A, 64))
336 self
.assertEqual(sim
.fpr(3), SelectableInt(0xc051266640000000, 64))
338 def test_fp_muls3(self
):
339 """>>> lst = ["fmuls 3, 1, 2",
342 lst
= ["fmuls 3, 1, 2",
346 fprs
[1] = 0xbfb0ab5100000000
347 fprs
[2] = 0xbdca000000000000
349 with
Program(lst
, bigendian
=False) as program
:
350 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
351 self
.assertEqual(sim
.fpr(3), SelectableInt(0x3d8b1663a0000000, 64))
353 def test_fp_muls4(self
):
354 """>>> lst = ["fmuls 3, 1, 2",
357 lst
= ["fmuls 3, 1, 2",
361 fprs
[1] = 0xbe724e2000000000 # negative number
362 fprs
[2] = 0x0 # times zero
364 with
Program(lst
, bigendian
=False) as program
:
365 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
366 # result should be -ve zero not +ve zero
367 self
.assertEqual(sim
.fpr(3), SelectableInt(0x8000000000000000, 64))
369 def test_fp_muls5(self
):
370 """>>> lst = ["fmuls 3, 1, 2",
373 lst
= ["fmuls 3, 1, 2",
377 fprs
[1] = 0xbfb0ab5100000000
378 fprs
[2] = 0xbdca000000000000
380 with
Program(lst
, bigendian
=False) as program
:
381 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
382 self
.assertEqual(sim
.fpr(3), SelectableInt(0x3d8b1663a0000000, 64))
384 def test_fp_mul(self
):
385 """>>> lst = ["fmul 3, 1, 2",
388 lst
= ["fmul 3, 1, 2", # 7.0 * -9.8 = -68.6
392 fprs
[1] = 0x401C000000000000 # 7.0
393 fprs
[2] = 0xC02399999999999A # -9.8
395 with
Program(lst
, bigendian
=False) as program
:
396 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
397 self
.assertEqual(sim
.fpr(1), SelectableInt(0x401C000000000000, 64))
398 self
.assertEqual(sim
.fpr(2), SelectableInt(0xC02399999999999A, 64))
399 self
.assertEqual(sim
.fpr(3), SelectableInt(0xC051266666666667, 64))
401 def test_fp_madd1(self
):
402 """>>> lst = ["fmadds 3, 1, 2, 4",
405 lst
= ["fmadds 3, 1, 2, 4", # 7.0 * -9.8 + 2 = -66.6
409 fprs
[1] = 0x401C000000000000 # 7.0
410 fprs
[2] = 0xC02399999999999A # -9.8
411 fprs
[4] = 0x4000000000000000 # 2.0
413 with
Program(lst
, bigendian
=False) as program
:
414 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
415 self
.assertEqual(sim
.fpr(3), SelectableInt(0xC050A66660000000, 64))
417 def test_fp_msub1(self
):
418 """>>> lst = ["fmsubs 3, 1, 2, 4",
421 lst
= ["fmsubs 3, 1, 2, 4", # 7.0 * -9.8 + 2 = -70.6
425 fprs
[1] = 0x401C000000000000 # 7.0
426 fprs
[2] = 0xC02399999999999A # -9.8
427 fprs
[4] = 0x4000000000000000 # 2.0
429 with
Program(lst
, bigendian
=False) as program
:
430 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
431 self
.assertEqual(sim
.fpr(3), SelectableInt(0xc051a66660000000, 64))
433 def test_fp_fcfids(self
):
434 """>>> lst = ["fcfids 1, 2",
435 lst = ["fcfids 3, 4",
438 lst
= ["fcfids 1, 2",
446 with
Program(lst
, bigendian
=False) as program
:
447 sim
= self
.run_tst_program(program
, initial_fprs
=fprs
)
448 self
.assertEqual(sim
.fpr(1), SelectableInt(0x401C000000000000, 64))
449 self
.assertEqual(sim
.fpr(2), SelectableInt(7, 64))
450 self
.assertEqual(sim
.fpr(3), SelectableInt(0xC040000000000000, 64))
451 self
.assertEqual(sim
.fpr(4), SelectableInt(-32, 64))
453 def run_tst_program(self
, prog
, initial_regs
=None,
456 if initial_regs
is None:
457 initial_regs
= [0] * 32
458 simulator
= run_tst(prog
, initial_regs
, mem
=initial_mem
,
459 initial_fprs
=initial_fprs
)
467 if __name__
== "__main__":