projects / openpower-isa.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: bb90516)
FP 63L/H ops need to add in extra 0/1 minor_63l.csv minor_63h.csv
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 15 May 2021 14:46:00 +0000 (15:46 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 15 May 2021 14:46:00 +0000 (15:46 +0100)
a hard-coded test in microwatt decode1.vhdl tests bit 5
we need an automated switch statement

openpower/isatables/minor_63h.csv patch | blob | history
openpower/isatables/minor_63l.csv patch | blob | history
src/openpower/decoder/power_enums.py patch | blob | history

diff --git a/openpower/isatables/minor_63h.csv b/openpower/isatables/minor_63h.csv
index 0e1358e1c64563496943f878ff6297f38098afa6..3c6bd1093a71a77db84292d093a4e0507412d42d 100644 (file)
--- a/openpower/isatables/minor_63h.csv
+++ b/openpower/isatables/minor_63h.csv
@@ -1,13 +1,13 @@
 opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form
-0b0010,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fdiv,
-0b0100,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fsub,
-0b0101,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fadd,
-0b0110,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fsqrt,
-0b0111,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fsel,
-0b1000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fre,
-0b1001,FPU,OP_FPOP,FRA,NONE,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fmul,
-0b1010,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,frsqrte,
-0b1100,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fmsub,
-0b1101,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fmadd,
-0b1110,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fnmsub,
-0b1111,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fnmadd,
+0b10010,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fdiv,
+0b10100,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fsub,
+0b10101,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fadd,
+0b10110,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fsqrt,
+0b10111,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fsel,
+0b11000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fre,
+0b11001,FPU,OP_FPOP,FRA,NONE,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fmul,
+0b11010,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,frsqrte,
+0b11100,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fmsub,
+0b11101,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fmadd,
+0b11110,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fnmsub,
+0b11111,FPU,OP_FPOP,FRA,FRB,FRC,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,fnmadd,
diff --git a/openpower/isatables/minor_63l.csv b/openpower/isatables/minor_63l.csv
index 580e2081902dccb8a5c5e7c801f61d46036a502e..53609c14b7d41e6ccb66ffb662a430af7b9d8240 100644 (file)
--- a/openpower/isatables/minor_63l.csv
+++ b/openpower/isatables/minor_63l.csv
@@ -1,33 +1,33 @@
 opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form
-0b000000000,FPU,OP_FPOP,FRA,FRB,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,0/0=fcmpu,
-0b000000001,FPU,OP_FPOP,FRA,FRB,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,1/0=fcmpo,
-0b000000010,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,2/0=mcrfs,
-0b000000100,FPU,OP_FPOP,FRA,FRB,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,4/0=ftdiv,
-0b000000101,FPU,OP_FPOP,NONE,FRB,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,5/0=ftsqrt,
-0b011000001,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,1/6=mtfsb1,
-0b011000010,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,2/6=mtfsb0,
-0b011000100,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/6=mtfsfi,
-0b011011010,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,26/6=fmrgow,
-0b011011110,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,30/6=fmrgew,
-0b011110010,FPU,OP_FPOP_I,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,18/7=mffsfamily,
-0b011110110,FPU,OP_FPOP_I,NONE,FRB,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,22/7=mtfsf,
-0b100000000,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/8=fcpsgn,
-0b100000001,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,1/8=fneg,
-0b100000010,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,2/8=fmr,
-0b100000100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/8=fnabs,
-0b100001000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,8/8=fabs,
-0b100001100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,12/8=frin,
-0b100001101,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,13/8=friz,
-0b100001110,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,14/8=frip,
-0b100001111,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,15/8=frim,
-0b110000000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC,0,0,0/12=frsp,
-0b111000000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/14=fctiw,
-0b111000100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/14=fctiwu,
-0b111011001,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,25/14=fctid,
-0b111011010,FPU,OP_FPOP_I,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,26/14=fcfid,
-0b111011101,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,29/14=fctidu,
-0b111011110,FPU,OP_FPOP_I,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,30/14=fcfidu,
-0b111100000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/15=fctiwz,
-0b111100100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/15=fctiwuz,
-0b111111001,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,25/15=fctidz,
-0b111111101,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,29/15=fctiduz,
+0b0000000000,FPU,OP_FPOP,FRA,FRB,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,0/0=fcmpu,
+0b0000000001,FPU,OP_FPOP,FRA,FRB,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,1/0=fcmpo,
+0b0000000010,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,2/0=mcrfs,
+0b0000000100,FPU,OP_FPOP,FRA,FRB,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,4/0=ftdiv,
+0b0000000101,FPU,OP_FPOP,NONE,FRB,NONE,NONE,NONE,BF,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,5/0=ftsqrt,
+0b0110000001,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,1/6=mtfsb1,
+0b0110000010,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,2/6=mtfsb0,
+0b0110000100,FPU,OP_FPOP,NONE,NONE,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/6=mtfsfi,
+0b0110011010,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,26/6=fmrgow,
+0b0110011110,FPU,OP_FPOP_I,FRA,FRB,NONE,FRT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,30/6=fmrgew,
+0b0111010010,FPU,OP_FPOP_I,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,18/7=mffsfamily,
+0b0111010110,FPU,OP_FPOP_I,NONE,FRB,NONE,NONE,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,22/7=mtfsf,
+0b1000000000,FPU,OP_FPOP,FRA,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/8=fcpsgn,
+0b1000000001,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,1/8=fneg,
+0b1000000010,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,2/8=fmr,
+0b1000000100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/8=fnabs,
+0b1000001000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,8/8=fabs,
+0b1000001100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,12/8=frin,
+0b1000001101,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,13/8=friz,
+0b1000001110,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,14/8=frip,
+0b1000001111,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,15/8=frim,
+0b1100000000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,1,0,RC,0,0,0/12=frsp,
+0b1110000000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/14=fctiw,
+0b1110000100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/14=fctiwu,
+0b1110011001,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,25/14=fctid,
+0b1110011010,FPU,OP_FPOP_I,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,26/14=fcfid,
+0b1110011101,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,29/14=fctidu,
+0b1110011110,FPU,OP_FPOP_I,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,30/14=fcfidu,
+0b1111000000,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,0/15=fctiwz,
+0b1111000100,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,4/15=fctiwuz,
+0b1111011001,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,25/15=fctidz,
+0b1111011101,FPU,OP_FPOP,NONE,FRB,NONE,FRT,NONE,CR1,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,29/15=fctiduz,
diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 0d886ff8044f8d6ec003bc8fffe38f04d0d56436..959748077e5c38eb106ee2c12778c3bc3161a7a1 100644 (file)
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -357,6 +357,8 @@ class MicrOp(Enum):
     OP_MTMSR = 74
     OP_TLBIE = 75
     OP_SETVL = 76
+    OP_FPOP = 77  # temporary: replace with actual ops
+    OP_FPOPI = 78 # temporary: replace with actual ops
 
 
 @unique