pysvp64db: fix traversal
[openpower-isa.git] / src / openpower / sv / sv_analysis.py
2024-02-03 Luke Kenneth Casso... fix merge
2024-01-30 Luke Kenneth Casso... bug 1236: add extra argument to svstep: RA.
2024-01-30 Luke Kenneth Casso... bug 1236: add extra argument to svstep: RA.
2024-01-25 Luke Kenneth Casso... bug 1034: add crbinlog and crternlogi, rename crbinlog...
2024-01-20 Luke Kenneth Casso... bug 1034: properly qualify crbinlog and crternlogi...
2023-07-25 Jacob Lifshayadd set[n]bc[r] -- tests broken
2023-07-22 Jacob Lifshayadd SVP64 tests for cfuged, cntlzdm, cnttzdm, pdepd...
2023-06-17 Jacob Lifshayremove Rc=1 from fmvfg[s]
2023-06-17 Jacob Lifshaysv_analysis: raise error instead of outputting TODO
2023-06-03 Luke Kenneth Casso... correct RS/RA/CR0 for rlwinm which is 2P-1S1D
2023-06-01 Jacob Lifshaymake maddsubrs show up in SVP64 generated CSVs
2023-06-01 Jacob Lifshayraise error on unhandled instruction kind
2023-05-18 Jacob Lifshayadd fmv*/fcvt* to sv_analysis.py
2023-05-15 Luke Kenneth Casso... fix sv_analysis ldux, missing s/d:RA
2023-05-15 Luke Kenneth Casso... remove extraneous space
2023-05-15 Luke Kenneth Casso... ld/st mismatch in power_insn.py and sv_analysis.py
2023-05-15 Luke Kenneth Casso... in DCT/FFT 3-in 2-out set had to make RT same source...
2023-05-14 Luke Kenneth Casso... classify LD/ST-Immediate-Update as EXTRA3.
2023-05-14 Luke Kenneth Casso... whitespace cleanup and remove as many PHP-style-formatt...
2023-05-04 Luke Kenneth Casso... maddsubrs no longer has CR0
2023-04-28 Luke Kenneth Casso... reduce number of operands to ffmadds as well
2023-04-28 Luke Kenneth Casso... reduce fdmadds down to only 3 operands, RT-overwrite...
2023-01-18 Dmitry Selyutinpower_insn: major refactoring and cleanup
2022-10-06 Luke Kenneth Casso... add sv.cmp and try fail-first test_pysvp64dist.py
2022-09-23 Jacob Lifshayadd pcdec -- doesn't yet work due to broken ISACaller...
2022-09-23 Jacob Lifshayformat code
2022-09-21 Luke Kenneth Casso... add sv.madd* to sv_analysis
2022-09-20 Luke Kenneth Casso... sv.bc reclassified as RM-2P-1S by eliminating SPRs.
2022-09-17 Luke Kenneth Casso... add SVmask_src enum, rename fields to EN and NO to...
2022-09-17 Luke Kenneth Casso... as a double-check sv_analysis new CSV column "SM" was...
2022-09-17 Luke Kenneth Casso... add a "SM" column into RM*.csv (and LDSTRM*.csv) identi...
2022-09-14 Jacob Lifshayfix sv_analysis for fpown and frootn
2022-09-12 Luke Kenneth Casso... add sv.setvl to instructions as a major hack
2022-09-12 Luke Kenneth Casso... skip addpcis for now, needs properly qualifying
2022-09-03 Luke Kenneth Casso... update sv_analysis to create separate SVMode.LDST_IDX...
2022-08-14 Dmitry Selyutinisatables: introduce instruction database CSV
2022-08-14 Dmitry Selyutinsv_analysis: decouple CSVs glob code
2022-08-13 Luke Kenneth Casso... remove Pack/Unpack flag entirely from sv_analysis
2022-08-13 Luke Kenneth Casso... disable pack/unpack in sv_analysis.py - going to use...
2022-08-07 Luke Kenneth Casso... move reg ptogiling out to separate function in sv_analysis
2022-08-07 Luke Kenneth Casso... move extra classification to separate function in sv_an...
2022-08-06 Luke Kenneth Casso... split cav reading into separate function
2022-08-06 Luke Kenneth Casso... add svanalysis docstrings
2022-08-05 Luke Kenneth Casso... Revert "comment out mfcr in sv_analysis.py for now"
2022-08-05 Luke Kenneth Casso... add fishmv unusual overwrite to svanalysis
2022-08-05 Luke Kenneth Casso... comment out mfcr in sv_analysis.py for now
2022-08-03 Luke Kenneth Casso... completely bungled multi-EXTRA specs
2022-08-03 Luke Kenneth Casso... WHOOPS. set the pack column in CSV files unconditionall...
2022-07-30 Luke Kenneth Casso... add LDST-2P-*PU.csv, tracked down weirdness, it was the
2022-07-30 Luke Kenneth Casso... addPack/Unpack to sv_analysis, extra CSV column.
2022-07-28 Luke Kenneth Casso... much dumbness. fmvis is RM-1P-1D
2022-07-28 Luke Kenneth Casso... Revert "add fmvis as a new RM-1P-1S SVP64 RM type"
2022-07-28 Luke Kenneth Casso... add fmvis as a new RM-1P-1S SVP64 RM type
2022-06-30 Luke Kenneth Casso... do CSV isatables explicitly in sv_analysis.py
2022-06-30 Luke Kenneth Casso... explicit output of opcode_regs_deduped in mdwn table...
2022-05-02 Luke Kenneth Casso... add missing SVP64 RM "Mode" field which qualifies instr...
2021-12-09 Luke Kenneth Casso... add warning about creation of "-.csv" which indicates...
2021-12-02 Jacob Lifshayfix sv_analysis command, cuz script created by setup...
2021-12-02 Jacob Lifshayformat code
2021-11-30 Dmitry Selyutinsv_analysis: decouple declarations and definitions
2021-11-30 Dmitry Selyutinsv_analysis: use is instead of eq for enums
2021-11-30 Dmitry Selyutinsv_analysis: fix single-line binutils comments
2021-11-27 Dmitry Selyutinsv_analysis: decouple common disclaimer
2021-11-27 Dmitry Selyutinsv_analysis: introduce stub binutils format
2021-11-27 Dmitry Selyutinsv_analysis: support format argument
2021-11-12 Jacob Lifshaychange ternaryi to correct register fields
2021-11-12 Jacob Lifshayformat code
2021-08-08 Luke Kenneth Casso... add bc and bclr to sv_analysis
2021-07-24 Luke Kenneth Casso... added an extra SVP64 instruction, svstep, to replace...
2021-06-25 Luke Kenneth Casso... identify SVP64 LD bit-reverse pattern as pseudo-assembler
2021-06-25 Luke Kenneth Casso... update sv_analysis.py to match new CONDITIONs field...
2021-06-15 Luke Kenneth Casso... fix sv_analysis.py for 3R-1W-CRo case, add fmadds/fmsub...
2021-05-18 Luke Kenneth Casso... fix SVP64 EXTRA2/3 decode for IEEE754 FP LD/ST operations
2021-04-23 Luke Kenneth Casso... sort out sv_analysys.py moving to openpower-isa