openpower-isa.git
6 months agoadd fpcvt.mdwn pseudocode which calls new auto-generated function
Luke Kenneth Casson Leighton [Sun, 16 May 2021 15:01:35 +0000 (16:01 +0100)]
add fpcvt.mdwn pseudocode which calls new auto-generated function
taken from Section A.3 for FP conversion

6 months agoadd new pyfnwriter command, converts v3.0B spec pseudocode helper functions
Luke Kenneth Casson Leighton [Sun, 16 May 2021 13:29:30 +0000 (14:29 +0100)]
add new pyfnwriter command, converts v3.0B spec pseudocode helper functions
into python

6 months agocreate compiler for general pseudo-code functions in v3.0B spec
Luke Kenneth Casson Leighton [Sun, 16 May 2021 13:24:25 +0000 (14:24 +0100)]
create compiler for general pseudo-code functions in v3.0B spec
specifically to support FP such as convert from int etc

6 months agoadd function reader for appendix and other v3.0B pseudocode
Luke Kenneth Casson Leighton [Sun, 16 May 2021 12:58:52 +0000 (13:58 +0100)]
add function reader for appendix and other v3.0B pseudocode

6 months agocomments in fp convert, fix carry out, comment out FPSCR for now
Luke Kenneth Casson Leighton [Sun, 16 May 2021 12:39:48 +0000 (13:39 +0100)]
comments in fp convert, fix carry out, comment out FPSCR for now

6 months agospelling
Luke Kenneth Casson Leighton [Sat, 15 May 2021 23:08:55 +0000 (00:08 +0100)]
spelling

6 months agomove round_float to separate file
Luke Kenneth Casson Leighton [Sat, 15 May 2021 23:08:34 +0000 (00:08 +0100)]
move round_float to separate file

6 months agoadd fpfromint.mdwn new file, to be used for FP conversion
Luke Kenneth Casson Leighton [Sat, 15 May 2021 23:06:12 +0000 (00:06 +0100)]
add fpfromint.mdwn new file, to be used for FP conversion
contains pseudocode from v3.0B spec, A.3 p782 book I

6 months agoextra debug print
Luke Kenneth Casson Leighton [Sat, 15 May 2021 19:16:45 +0000 (20:16 +0100)]
extra debug print

6 months agowhoops, FRC taken from FormX.FRB not FormA.FRC
Luke Kenneth Casson Leighton [Sat, 15 May 2021 19:16:25 +0000 (20:16 +0100)]
whoops, FRC taken from FormX.FRB not FormA.FRC

6 months agoFP mul test, correct pseudocode to use FRC
Luke Kenneth Casson Leighton [Sat, 15 May 2021 19:09:54 +0000 (20:09 +0100)]
FP mul test, correct pseudocode to use FRC

6 months agoadd minor_59.csv file, corrected, and power enums
Luke Kenneth Casson Leighton [Sat, 15 May 2021 18:54:02 +0000 (19:54 +0100)]
add minor_59.csv file, corrected, and power enums
operations fcfids, fcfidus, fsqrt etc.

6 months agoreturn result in FPXXX64 functions (whoops)
Luke Kenneth Casson Leighton [Sat, 15 May 2021 18:47:33 +0000 (19:47 +0100)]
return result in FPXXX64 functions (whoops)

6 months agowhen calling multi-arg function with regs, add to read list
Luke Kenneth Casson Leighton [Sat, 15 May 2021 18:47:17 +0000 (19:47 +0100)]
when calling multi-arg function with regs, add to read list

6 months agoissue with sub-decoders
Luke Kenneth Casson Leighton [Sat, 15 May 2021 18:31:16 +0000 (19:31 +0100)]
issue with sub-decoders
merged FP HI/LO 63 (minor_63.csv only) due to clash on pattern 63

6 months agoadd fadd/sub/mul/div to power_enums
Luke Kenneth Casson Leighton [Sat, 15 May 2021 18:09:13 +0000 (19:09 +0100)]
add fadd/sub/mul/div to power_enums

6 months agoadd FP basic arithmetic operations, pseudocode, fparith.mdwn
Luke Kenneth Casson Leighton [Sat, 15 May 2021 18:02:29 +0000 (19:02 +0100)]
add FP basic arithmetic operations, pseudocode, fparith.mdwn

6 months agocomments
Luke Kenneth Casson Leighton [Sat, 15 May 2021 17:06:15 +0000 (18:06 +0100)]
comments

6 months agoadd fcpsgn unit test
Luke Kenneth Casson Leighton [Sat, 15 May 2021 17:04:54 +0000 (18:04 +0100)]
add fcpsgn unit test

6 months agoadd fnabs unit test
Luke Kenneth Casson Leighton [Sat, 15 May 2021 17:02:14 +0000 (18:02 +0100)]
add fnabs unit test

6 months agoadd fabs unit test
Luke Kenneth Casson Leighton [Sat, 15 May 2021 16:41:52 +0000 (17:41 +0100)]
add fabs unit test

6 months agoadd fp mv test, correct pseudocode
Luke Kenneth Casson Leighton [Sat, 15 May 2021 16:38:03 +0000 (17:38 +0100)]
add fp mv test, correct pseudocode

6 months agowhoops initialise FPRs from GPRs in ISACaller
Luke Kenneth Casson Leighton [Sat, 15 May 2021 16:08:01 +0000 (17:08 +0100)]
whoops initialise FPRs from GPRs in ISACaller

6 months agomissed an assignment-copy for simple expressions
Luke Kenneth Casson Leighton [Sat, 15 May 2021 16:05:26 +0000 (17:05 +0100)]
missed an assignment-copy for simple expressions

6 months agoadd fmr test and associated decoder (optional with include_fp)
Luke Kenneth Casson Leighton [Sat, 15 May 2021 15:57:27 +0000 (16:57 +0100)]
add fmr test and associated decoder (optional with include_fp)

6 months agoadd X-Form and A-Form to minor_63l and minor_63h csv files
Luke Kenneth Casson Leighton [Sat, 15 May 2021 15:13:07 +0000 (16:13 +0100)]
add X-Form and A-Form to minor_63l and minor_63h csv files
add option to create_pdecode to include FP ops

6 months agowhoops need to reverse bits in minor_63l.csv to match linear switch
Luke Kenneth Casson Leighton [Sat, 15 May 2021 14:52:18 +0000 (15:52 +0100)]
whoops need to reverse bits in minor_63l.csv to match linear switch

6 months agoFP 63L/H ops need to add in extra 0/1 minor_63l.csv minor_63h.csv
Luke Kenneth Casson Leighton [Sat, 15 May 2021 14:46:00 +0000 (15:46 +0100)]
FP 63L/H ops need to add in extra 0/1 minor_63l.csv minor_63h.csv
a hard-coded test in microwatt decode1.vhdl tests bit 5
we need an automated switch statement

6 months agoadd fp move opcodes to power_enums.py
Luke Kenneth Casson Leighton [Sat, 15 May 2021 14:37:05 +0000 (15:37 +0100)]
add fp move opcodes to power_enums.py

6 months agoadd new fp load / store with update unit test
Luke Kenneth Casson Leighton [Sat, 15 May 2021 13:11:18 +0000 (14:11 +0100)]
add new fp load / store with update unit test

6 months agoadd FP store op names to power_enums.py opcode list
Luke Kenneth Casson Leighton [Sat, 15 May 2021 12:44:34 +0000 (13:44 +0100)]
add FP store op names to power_enums.py opcode list

6 months agowhitespace on instruction mnemonics
Luke Kenneth Casson Leighton [Sat, 15 May 2021 12:41:39 +0000 (13:41 +0100)]
whitespace on instruction mnemonics

6 months agoadd FP LD/ST D-Form operations to major.csv
Luke Kenneth Casson Leighton [Sat, 15 May 2021 11:40:05 +0000 (12:40 +0100)]
add FP LD/ST D-Form operations to major.csv

6 months agoadd load/store FP indexed instructions to minor_31.csv
Luke Kenneth Casson Leighton [Sat, 15 May 2021 11:29:46 +0000 (12:29 +0100)]
add load/store FP indexed instructions to minor_31.csv

6 months agoadd FP load test lfsx
Luke Kenneth Casson Leighton [Fri, 14 May 2021 21:18:25 +0000 (22:18 +0100)]
add FP load test lfsx

6 months agowhen setting x <- GPR(RA) make sure read_regs is added to in parser
Luke Kenneth Casson Leighton [Fri, 14 May 2021 20:29:21 +0000 (21:29 +0100)]
when setting  x <- GPR(RA) make sure read_regs is added to in parser

6 months agoadd GPR-underscore read of regs
Luke Kenneth Casson Leighton [Fri, 14 May 2021 20:19:15 +0000 (21:19 +0100)]
add GPR-underscore read of regs

6 months agoadd FRA ISACaller name decoding
Luke Kenneth Casson Leighton [Fri, 14 May 2021 19:54:29 +0000 (20:54 +0100)]
add FRA ISACaller name decoding

6 months agoadd FRA-FRT to power enums
Luke Kenneth Casson Leighton [Fri, 14 May 2021 19:36:19 +0000 (20:36 +0100)]
add FRA-FRT to power enums

6 months agoadd first FP load test, still a lot TODO
Luke Kenneth Casson Leighton [Fri, 14 May 2021 19:29:35 +0000 (20:29 +0100)]
add first FP load test, still a lot TODO

6 months agoadd FPR (FP Regfile) to ISACaller
Luke Kenneth Casson Leighton [Fri, 14 May 2021 19:13:06 +0000 (20:13 +0100)]
add FPR (FP Regfile) to ISACaller

6 months agoadd in FPR.getz and support for FPR(x) in ISA parser
Luke Kenneth Casson Leighton [Fri, 14 May 2021 19:07:00 +0000 (20:07 +0100)]
add in FPR.getz and support for FPR(x) in ISA parser

6 months agoadd FRA-FRT fp reg names to ISACaller parser
Luke Kenneth Casson Leighton [Fri, 14 May 2021 18:53:52 +0000 (19:53 +0100)]
add FRA-FRT fp reg names to ISACaller parser

6 months agoadd fpmove.mdwn from v3.0B p150 book I section 4.6.5
Luke Kenneth Casson Leighton [Fri, 14 May 2021 17:59:20 +0000 (18:59 +0100)]
add fpmove.mdwn from v3.0B p150 book I section 4.6.5

6 months agoclarify, comments
Luke Kenneth Casson Leighton [Fri, 14 May 2021 17:50:08 +0000 (18:50 +0100)]
clarify, comments

6 months agoadd FPADD, FPSUB, FPMUL, FPDIV quick hacked functions
Luke Kenneth Casson Leighton [Fri, 14 May 2021 17:49:10 +0000 (18:49 +0100)]
add FPADD, FPSUB, FPMUL, FPDIV quick hacked functions

6 months agoadd very quick float convert to SelectableInt
Luke Kenneth Casson Leighton [Fri, 14 May 2021 17:28:31 +0000 (18:28 +0100)]
add very quick float convert to SelectableInt

6 months agoadd import of DOUBLE/SINGLE to pywriter
Luke Kenneth Casson Leighton [Fri, 14 May 2021 16:56:06 +0000 (17:56 +0100)]
add import of DOUBLE/SINGLE to pywriter

6 months agoadd SINGLE function to helpers, for FP Store
Luke Kenneth Casson Leighton [Fri, 14 May 2021 16:47:48 +0000 (17:47 +0100)]
add SINGLE function to helpers, for FP Store

6 months agoadd first pass at DOUBLE helper function for FP ISACaller simulation
Luke Kenneth Casson Leighton [Fri, 14 May 2021 16:31:35 +0000 (17:31 +0100)]
add first pass at DOUBLE helper function for FP ISACaller simulation

6 months agoadd zero-variant (RA|0) in fpload pseudocode, cleaner, clearer
Luke Kenneth Casson Leighton [Fri, 14 May 2021 16:13:09 +0000 (17:13 +0100)]
add zero-variant (RA|0) in fpload pseudocode, cleaner, clearer

6 months agoadd fpstore.mdwn
Luke Kenneth Casson Leighton [Fri, 14 May 2021 16:11:42 +0000 (17:11 +0100)]
add fpstore.mdwn

6 months agoadd fpload.mdwn for FP simulation
Luke Kenneth Casson Leighton [Fri, 14 May 2021 15:49:24 +0000 (16:49 +0100)]
add fpload.mdwn for FP simulation

6 months agoadd setting of MSR "PR" bit for when running MMU test
Luke Kenneth Casson Leighton [Tue, 11 May 2021 11:27:00 +0000 (12:27 +0100)]
add setting of MSR "PR" bit for when running MMU test

6 months agoextra checks on ldst exception unit test
Luke Kenneth Casson Leighton [Mon, 10 May 2021 17:13:29 +0000 (18:13 +0100)]
extra checks on ldst exception unit test

6 months agofix MemException, return correct address in DAR
Luke Kenneth Casson Leighton [Mon, 10 May 2021 17:03:24 +0000 (18:03 +0100)]
fix MemException, return correct address in DAR

6 months agotesting load misaligned
Luke Kenneth Casson Leighton [Mon, 10 May 2021 17:01:01 +0000 (18:01 +0100)]
testing load misaligned

6 months agotest_maxint, add zero onto 0xffffffffffffff
Luke Kenneth Casson Leighton [Mon, 10 May 2021 17:00:47 +0000 (18:00 +0100)]
test_maxint, add zero onto 0xffffffffffffff

6 months agoadd first LD/ST exceptions test case for ISACaller
Luke Kenneth Casson Leighton [Mon, 10 May 2021 16:49:19 +0000 (17:49 +0100)]
add first LD/ST exceptions test case for ISACaller

6 months agosave SVSRR0 in trap, if SVP64 mode enabled
Luke Kenneth Casson Leighton [Mon, 10 May 2021 15:24:57 +0000 (16:24 +0100)]
save SVSRR0 in trap, if SVP64 mode enabled

6 months agocreate new call_trap function in ISACaller
Luke Kenneth Casson Leighton [Mon, 10 May 2021 15:22:34 +0000 (16:22 +0100)]
create new call_trap function in ISACaller

6 months agoadd catch of MemException in ISACaller to raise unaligned exception 0x600
Luke Kenneth Casson Leighton [Mon, 10 May 2021 15:10:14 +0000 (16:10 +0100)]
add catch of MemException in ISACaller to raise unaligned exception 0x600
DAR is set as the address raised from the exception

6 months agoinclude Error keyword in message
Luke Kenneth Casson Leighton [Mon, 10 May 2021 14:42:04 +0000 (15:42 +0100)]
include Error keyword in message

6 months agoallow unaligned access exception to be raised in ISACaller mem simulator
Luke Kenneth Casson Leighton [Mon, 10 May 2021 14:41:14 +0000 (15:41 +0100)]
allow unaligned access exception to be raised in ISACaller mem simulator

6 months agoadd ld/st misalignment test case
Luke Kenneth Casson Leighton [Sun, 9 May 2021 14:57:09 +0000 (15:57 +0100)]
add ld/st misalignment test case

7 months agoadd relevant pred source/dest mask bits and create appropriate zeroing
Luke Kenneth Casson Leighton [Thu, 6 May 2021 17:51:33 +0000 (18:51 +0100)]
add relevant pred source/dest mask bits and create appropriate zeroing
signal for predicate source/dest

7 months agoadd first SVP64 predicate dest-zeroing unit test
Luke Kenneth Casson Leighton [Thu, 6 May 2021 16:26:52 +0000 (17:26 +0100)]
add first SVP64 predicate dest-zeroing unit test

7 months agoremove non-predicated svp64 ISACaller tests
Luke Kenneth Casson Leighton [Thu, 6 May 2021 16:19:46 +0000 (17:19 +0100)]
remove non-predicated svp64 ISACaller tests

7 months agoimprove format of docstrings for ISACaller SVP64 tests
Luke Kenneth Casson Leighton [Thu, 6 May 2021 16:17:19 +0000 (17:17 +0100)]
improve format of docstrings for ISACaller SVP64 tests

7 months agoreformat SVP64 docstrings to vaguely resemble something useful in sphinx-doc
Luke Kenneth Casson Leighton [Thu, 6 May 2021 13:36:45 +0000 (14:36 +0100)]
reformat SVP64 docstrings to vaguely resemble something useful in sphinx-doc

7 months agosphinx docstring highlight of SVP64 listings
Luke Kenneth Casson Leighton [Thu, 6 May 2021 13:16:48 +0000 (14:16 +0100)]
sphinx docstring highlight of SVP64 listings

7 months agomove logical SVP64 test cases to separate file/directory
Luke Kenneth Casson Leighton [Thu, 6 May 2021 12:39:46 +0000 (13:39 +0100)]
move logical SVP64 test cases to separate file/directory

7 months agowhoops error in docstring
Luke Kenneth Casson Leighton [Thu, 6 May 2021 12:34:08 +0000 (13:34 +0100)]
whoops error in docstring

7 months agotidy up svp64 cases to make it better suited to documentation
Luke Kenneth Casson Leighton [Thu, 6 May 2021 12:31:36 +0000 (13:31 +0100)]
tidy up svp64 cases to make it better suited to documentation
https://bugs.libre-soc.org/show_bug.cgi?id=639

7 months agoupdate about Copyright law when it comes to facts
Luke Kenneth Casson Leighton [Wed, 5 May 2021 13:12:23 +0000 (14:12 +0100)]
update about Copyright law when it comes to facts

7 months agoadd symlink to license
Luke Kenneth Casson Leighton [Wed, 5 May 2021 13:03:43 +0000 (14:03 +0100)]
add symlink to license

7 months agoadd saturate SVP64 RM mode decode
Luke Kenneth Casson Leighton [Wed, 5 May 2021 13:02:43 +0000 (14:02 +0100)]
add saturate SVP64 RM mode decode

7 months agosplit PowerDecodeSubset do_copy into do_copy and do_get
Luke Kenneth Casson Leighton [Wed, 5 May 2021 12:52:36 +0000 (13:52 +0100)]
split PowerDecodeSubset do_copy into do_copy and do_get

7 months agoexplicitly copy SV RM decoded fields in PowerDecodeSubset
Luke Kenneth Casson Leighton [Wed, 5 May 2021 12:37:22 +0000 (13:37 +0100)]
explicitly copy SV RM decoded fields in PowerDecodeSubset

7 months agomove SVP64 RM mode decoder into PowerDecodeSubset
Luke Kenneth Casson Leighton [Wed, 5 May 2021 12:32:13 +0000 (13:32 +0100)]
move SVP64 RM mode decoder into PowerDecodeSubset
this allows individual (satellite) decoders to get SVP64 characteristics
such as predication zeroing, saturation and other modes

7 months agoremove another verbose debug print
Luke Kenneth Casson Leighton [Wed, 5 May 2021 11:49:24 +0000 (12:49 +0100)]
remove another verbose debug print

7 months agoadd sv_input_record_layout to match SVP64RMModeDecode
Luke Kenneth Casson Leighton [Wed, 5 May 2021 11:46:56 +0000 (12:46 +0100)]
add sv_input_record_layout to match SVP64RMModeDecode

7 months agowhoops must include SVSTATE in STATE regfile regspec read/write map
Luke Kenneth Casson Leighton [Tue, 4 May 2021 17:33:36 +0000 (18:33 +0100)]
whoops must include SVSTATE in STATE regfile regspec read/write map

7 months agoIssuerDecode2ToOperand needs svstate (matching msr and cia)
Luke Kenneth Casson Leighton [Tue, 4 May 2021 17:30:44 +0000 (18:30 +0100)]
IssuerDecode2ToOperand needs svstate (matching msr and cia)

7 months agoadd more ALUHelper routines for fast3
Luke Kenneth Casson Leighton [Tue, 4 May 2021 17:09:54 +0000 (18:09 +0100)]
add more ALUHelper routines for fast3

7 months agoadd ALUHelpers check_fast_spr3 for SVSRR0 checking
Luke Kenneth Casson Leighton [Tue, 4 May 2021 16:56:03 +0000 (17:56 +0100)]
add ALUHelpers check_fast_spr3 for SVSRR0 checking

7 months agoadd SVSRR0 to OP_RFID and OP_TRAP reg read/write
Luke Kenneth Casson Leighton [Tue, 4 May 2021 16:51:16 +0000 (17:51 +0100)]
add SVSRR0 to OP_RFID and OP_TRAP reg read/write

7 months agoadd fast3 to PowerDecoder and regspec map
Luke Kenneth Casson Leighton [Tue, 4 May 2021 16:38:52 +0000 (17:38 +0100)]
add fast3 to PowerDecoder and regspec map
needed for SVSRR0

7 months agoadd SVSRR0 spr_to_fast lookup
Luke Kenneth Casson Leighton [Tue, 4 May 2021 16:38:18 +0000 (17:38 +0100)]
add SVSRR0 spr_to_fast lookup

7 months agocopy over svstate from core state in PowerDecoder2
Luke Kenneth Casson Leighton [Tue, 4 May 2021 16:29:38 +0000 (17:29 +0100)]
copy over svstate from core state in PowerDecoder2
add SVSRR0 to FastRegsEnum

7 months agocomment out a bit more of the insanely high debug info
Luke Kenneth Casson Leighton [Tue, 4 May 2021 16:11:31 +0000 (17:11 +0100)]
comment out a bit more of the insanely high debug info

7 months agorename PowerDecoder2 exc field to ldst_exc
Luke Kenneth Casson Leighton [Tue, 4 May 2021 16:10:29 +0000 (17:10 +0100)]
rename PowerDecoder2 exc field to ldst_exc

7 months agomove "happened" field to end of LDSTException
Luke Kenneth Casson Leighton [Tue, 4 May 2021 12:48:37 +0000 (13:48 +0100)]
move "happened" field to end of LDSTException

7 months agodisable some of the extreme verbose debug printing
Luke Kenneth Casson Leighton [Tue, 4 May 2021 12:34:33 +0000 (13:34 +0100)]
disable some of the extreme verbose debug printing

7 months agoadd astor to setup.py dependencies
Luke Kenneth Casson Leighton [Sun, 2 May 2021 05:59:01 +0000 (06:59 +0100)]
add astor to setup.py dependencies

7 months agochange dependency name to libresoc-nmutil
Luke Kenneth Casson Leighton [Sun, 2 May 2021 05:51:07 +0000 (06:51 +0100)]
change dependency name to libresoc-nmutil

7 months agoclean up MMU ROM test case
Luke Kenneth Casson Leighton [Sat, 1 May 2021 15:18:33 +0000 (16:18 +0100)]
clean up MMU ROM test case

7 months agoadd single regression test for bc_ctr in branch cases
Luke Kenneth Casson Leighton [Fri, 30 Apr 2021 16:59:20 +0000 (17:59 +0100)]
add single regression test for bc_ctr in branch cases

7 months agofix executable names
Jacob Lifshay [Fri, 30 Apr 2021 02:01:44 +0000 (19:01 -0700)]
fix executable names

7 months agoadd additional unit tests
Luke Kenneth Casson Leighton [Mon, 26 Apr 2021 12:14:32 +0000 (13:14 +0100)]
add additional unit tests