rename to fabric
[pinmux.git] / src / spec / i_class.py
1 #!/usr/bin/env python
2
3 from spec.base import PinSpec
4
5 from spec.ifaceprint import display, display_fns, check_functions
6 from spec.ifaceprint import display_fixed
7
8
9 def pinspec():
10 pinbanks = {
11 'A': (28, 4),
12 'B': (18, 4),
13 'C': (24, 1),
14 'D': (93, 1),
15 }
16 fixedpins = {
17 'CTRL_SYS': [
18 'TEST',
19 'JTAG_SEL',
20 'UBOOT_SEL',
21 'NMI#',
22 'RESET#',
23 'CLK24M_IN',
24 'CLK24M_OUT',
25 'PLLTEST',
26 'PLLREGIO',
27 'PLLVP25',
28 'PLLDV',
29 'PLLVREG',
30 'PLLGND',
31 ],
32 'POWER_GPIO': [
33 'VDD_GPIOB',
34 'GND_GPIOB',
35 ]}
36 function_names = {'EINT': 'External Interrupt',
37 'FB': 'MC68k FlexBus',
38 'IIS': 'I2S Audio',
39 'JTAG': 'JTAG (JTAG_SEL=HI/LO)',
40 'LCD': '24-pin RGB/TTL LCD',
41 'RG': 'RGMII Ethernet',
42 'EMMC': 'eMMC 1/2/4/8 pin',
43 'PWM': 'PWM (pulse-width modulation)',
44 'MMC0': 'SD/MMC 0',
45 'MMC1': 'SD/MMC 1',
46 'MMC2': 'SD/MMC 2',
47 'MSPI0': 'SPI (Serial Peripheral Interface) Master 0',
48 'MSPI1': 'SPI (Serial Peripheral Interface) Master 1',
49 'MQSPI': 'Quad SPI Master 0',
50 'TWI0': 'I2C 0',
51 'TWI1': 'I2C 1',
52 'TWI2': 'I2C 2',
53 'QUART0': 'UART (TX/RX/CTS/RTS) 0',
54 'QUART1': 'UART (TX/RX/CTS/RTS) 1',
55 'UART0': 'UART (TX/RX) 0',
56 'UART1': 'UART (TX/RX) 1',
57 'UART2': 'UART (TX/RX) 2',
58 'ULPI0': 'ULPI (USB Low Pin-count) 0',
59 'ULPI1': 'ULPI (USB Low Pin-count) 1',
60 'ULPI2': 'ULPI (USB Low Pin-count) 2',
61 }
62
63 ps = PinSpec(pinbanks, fixedpins, function_names,
64 {'lcd': {'bus': 'fastbus',
65 'mmap': [['Cfg', 0x20000, 10]
66 ]},
67 'jtag': {'bus': 'fastbus'},
68 'fb': {'bus': 'fastbus'},
69 'sdr': {'bus': 'fastbus',
70 'mmap': [['Mem', 0x70000000, 0x400000],
71 ['Cfg', 0x17000, 12]
72 ]},
73 })
74
75 # Bank A, 0-27
76 ps.gpio("", ('A', 0), 0, 0, 28)
77 ps.rgbttl("", ('A', 0), 1, limit=22)
78 ps.mspi("0", ('A', 10), 2)
79 ps.mquadspi("", ('A', 4), 2)
80 ps.uart("0", ('A', 16), 2)
81 ps.i2c("1", ('A', 18), 2)
82 ps.pwm("", ('A', 21), 2, 0, 3)
83 ps.sdmmc("0", ('A', 22), 3)
84 ps.eint("", ('A', 0), 3, 0, 4)
85 ps.eint("", ('A', 20), 2, 4, 1)
86 ps.eint("", ('A', 23), 1, 5, 1)
87 ps.sdmmc("1", ('A', 4), 3)
88 ps.jtag("", ('A', 10), 3)
89 ps.uartfull("0", ('A', 14), 3)
90 ps.uartfull("1", ('A', 18), 3)
91 ps.jtag("", ('A', 24), 2)
92 ps.mspi("1", ('A', 24), 1)
93 ps.i2c("0", ('A', 0), 2)
94 ps.uart("1", ('A', 2), 2)
95 ps.uart("2", ('A', 14), 2)
96
97 # see comment in spec.interfaces.PinGen, this is complicated.
98 flexspec = {
99 #'FB_TS': ('FB_ALE', 2), # commented out for now
100 'FB_CS2': ('FB_BWE2', 2),
101 'FB_AD0': ('FB_BWE2', 3),
102 'FB_CS3': ('FB_BWE3', 2),
103 'FB_AD1': ('FB_BWE3', 3),
104 'FB_TBST': ('FB_OE', 2),
105 'FB_TSIZ0': ('FB_BWE0', 2),
106 'FB_TSIZ1': ('FB_BWE1', 2),
107 }
108 ps.gpio("", ('B', 0), 0, 0, 18)
109 ps.flexbus1("", ('B', 0), 1, spec=flexspec)
110 ps.emmc("", ('B', 0), 3)
111
112 ps.flexbus2("", ('C', 0), 0)
113
114 ps.sdram1("", ('D', 0), 0)
115 ps.sdram3("", ('D', 36), 0)
116
117 # Scenarios below can be spec'd out as either "find first interface"
118 # by name/number e.g. SPI1, or as "find in bank/mux" which must be
119 # spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
120 # EINT and PWM are grouped together, specially, but may still be spec'd
121 # using "BM:Name". Pins are removed in-order as listed from
122 # lists (interfaces, EINTs, PWMs) from available pins.
123
124 i_class = ['ULPI0/8', 'ULPI1', 'EMMC', 'MMC0', 'UART0',
125 'TWI0', 'MSPI0', 'B3:MMC1', ]
126 i_class_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3', 'EINT_4']
127 i_class_pwm = ['B2:PWM_0']
128 descriptions = {
129 'EMMC': 'internal (on Card)',
130 'SD0': 'user-facing: internal (on Card), multiplexed with JTAG\n'
131 'and UART2, for debug purposes',
132 'TWI2': 'I2C.\n',
133 'E2:MMC1': '',
134 'MSPI1': '',
135 'UART0': '',
136 'B1:LCD/22': '18-bit RGB/TTL LCD',
137 'ULPI0/8': 'user-facing: internal (on Card), USB-OTG ULPI PHY',
138 'ULPI1': 'dual USB2 Host ULPI PHY'
139 }
140
141 ps.add_scenario("I-Class", i_class, i_class_eint, i_class_pwm,
142 descriptions)
143
144 return ps