2 # see https://bugs.libre-soc.org/show_bug.cgi?id=303
4 from spec
.base
import PinSpec
6 from spec
.ifaceprint
import display
, display_fns
, check_functions
7 from spec
.ifaceprint
import display_fixed
35 'PWM': 'PWM (pulse-width modulation)',
36 'MSPI2': 'SPI (Serial Peripheral Interface) Master 1',
37 'UART1': 'UART (TX/RX) 1',
38 'UART3': 'UART (TX/RX) 2',
39 'LPC0': 'Low Pincount Interface 0',
42 ps
= PinSpec(pinbanks
, fixedpins
, function_names
)
44 ps
.gpio("", ('A', 1), 0, 0, 1)
45 ps
.gpio("", ('A', 0), 0, 1, 1)
46 ps
.gpio("", ('A', 3), 0, 2, 1)
47 ps
.gpio("", ('A', 2), 0, 3, 1)
48 ps
.gpio("", ('A', 4), 0, 5, 2)
49 ps
.gpio("", ('A', 6), 0, 9, 1)
51 ps
.gpio("", ('A', 7), 0, 13, 1)
52 ps
.gpio("", ('A', 8), 0, 10, 1)
53 ps
.gpio("", ('A', 9), 0, 12, 1)
54 ps
.gpio("", ('A', 10), 0, 11, 1)
56 ps
.gpio("", ('A', 11), 0, 4, 1)
57 ps
.gpio("", ('A', 12), 0, 7, 2)
58 ps
.gpio("", ('A', 14), 0, 14, 2)
64 ps
.pwm("", ('A', 2), 2, 0, 1)
65 ps
.pwm("", ('A', 4), 2, 1, 3)
66 ps
.pwm("", ('A', 8), 2, 4, 1)
67 ps
.pwm("", ('A', 10), 2, 5, 1)
68 #ps.pwm("", ('A', 13), 2, 5, 1)
69 ps
.mspi("2", ('A', 7), 1)
70 ps
.uart("1", ('A', 0), 1)
71 ps
.uart("3", ('A', 2), 1)
72 ps
.lpc("0", ('A', 11), 3)
74 #ps.mquadspi("1", ('B', 0), 0)
76 # Scenarios below can be spec'd out as either "find first interface"
77 # by name/number e.g. SPI1, or as "find in bank/mux" which must be
78 # spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
79 # EINT and PWM are grouped together, specially, but may still be spec'd
80 # using "BM:Name". Pins are removed in-order as listed from
81 # lists (interfaces, EINTs, PWMs) from available pins.
83 ls180
= ['ULPI0/8', 'ULPI1', 'MMC', 'SD0', 'UART0', 'LPC0',
84 'TWI0', 'MSPI0', 'B3:SD1', ]
86 ls180_pwm
= ['B2:PWM_0']
88 'MMC': 'internal (on Card)',
89 'SD0': 'user-facing: internal (on Card), multiplexed with JTAG\n'
90 'and UART2, for debug purposes',
96 'B1:LCD/22': '18-bit RGB/TTL LCD',
97 'ULPI0/8': 'user-facing: internal (on Card), USB-OTG ULPI PHY',
98 'ULPI1': 'dual USB2 Host ULPI PHY'
101 ps
.add_scenario("Libre-SOC 180nm", ls180
, ls180_eint
, ls180_pwm
,