2 # see https://bugs.libre-soc.org/show_bug.cgi?id=304
4 from spec
.base
import PinSpec
5 from parse
import Parse
8 from spec
.ifaceprint
import display
, display_fns
, check_functions
9 from spec
.ifaceprint
import display_fixed
10 from collections
import OrderedDict
13 pinbanks
= OrderedDict((
41 'PWM': 'PWM (pulse-width modulation)',
42 'MSPI0': 'SPI Master 1 (general)',
43 'MSPI1': 'SPI Master 2 (SDCard)',
44 'UART0': 'UART (TX/RX) 1',
45 'SYS': 'System Control',
47 'EINT': 'External Interrupt',
50 'TWI': 'I2C Master 1',
55 #'LPC1': 'Low Pincount Interface 1',
56 #'LPC2': 'Low Pincount Interface 2',
59 ps
= PinSpec(pinbanks
, fixedpins
, function_names
)
61 ps
.vss("", ('N', 0), 0, 0, 1)
62 ps
.vdd("", ('N', 1), 0, 0, 1)
63 ps
.sdram1("", ('N', 2), 0, 0, 30)
64 ps
.vss("", ('N', 30), 0, 1, 1)
65 ps
.vdd("", ('N', 31), 0, 1, 1)
67 ps
.vss("", ('E', 0), 0, 2, 1)
68 ps
.sdram2("", ('E', 1), 0, 0, 12)
69 ps
.vdd("", ('E', 13), 0, 2, 1)
70 ps
.gpio("", ('E', 14), 0, 8, 8)
71 ps
.vss("", ('E', 23), 0, 3, 1)
72 ps
.jtag("", ('E', 24), 0, 0, 4)
73 ps
.vdd("", ('E', 31), 0, 3, 1)
75 ps
.vss("", ('S', 0), 0, 4, 1)
76 ps
.sys("", ('S', 1), 0, 0, 7)
77 ps
.vdd("", ('S', 8), 0, 4, 1)
78 ps
.i2c("", ('S', 9), 0, 0, 2)
79 ps
.mspi("0", ('S', 15), 0)
80 ps
.uart("0", ('S', 20), 0)
81 ps
.vss("", ('S', 22), 0, 5, 1)
82 ps
.gpio("", ('S', 23), 0, 0, 8)
83 ps
.vdd("", ('S', 31), 0, 5, 1)
85 ps
.vss("", ('W', 0), 0, 6, 1)
86 ps
.pwm("", ('W', 1), 0, 0, 2)
87 ps
.eint("", ('W', 3), 0, 0, 3)
88 ps
.mspi("1", ('W', 6), 0)
89 ps
.vdd("", ('W', 10), 0, 6, 1)
90 ps
.sdmmc("0", ('W', 11), 0)
91 ps
.vss("", ('W', 17), 0, 7, 1)
92 ps
.vdd("", ('W', 31), 0, 7, 1)
93 #ps.mspi("0", ('W', 8), 0)
94 #ps.mspi("1", ('W', 8), 0)
96 #ps.mquadspi("1", ('S', 0), 0)
98 print "ps clocks", ps
.clocks
100 # Scenarios below can be spec'd out as either "find first interface"
101 # by name/number e.g. SPI1, or as "find in bank/mux" which must be
102 # spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
103 # EINT and PWM are grouped together, specially, but may still be spec'd
104 # using "BM:Name". Pins are removed in-order as listed from
105 # lists (interfaces, EINTs, PWMs) from available pins.
107 ls180
= ['SD0', 'UART0', 'GPIOS', 'GPIOE', 'JTAG', 'PWM', 'EINT',
109 'TWI', 'MSPI0', 'MSPI1', 'SDR']
111 ls180_pwm
= []#['B0:PWM_0']
113 'SD0': 'user-facing: internal (on Card), multiplexed with JTAG\n'
114 'and UART2, for debug purposes',
123 'B1:LCD/22': '18-bit RGB/TTL LCD',
124 'ULPI0/8': 'user-facing: internal (on Card), USB-OTG ULPI PHY',
125 'ULPI1': 'dual USB2 Host ULPI PHY'
128 ps
.add_scenario("Libre-SOC 180nm", ls180
, ls180_eint
, ls180_pwm
,
134 # map pins to litex name conventions, primarily for use in coriolis2
135 def pinparse(pinspec
):
136 p
= Parse(pinspec
, verify
=False)
139 print p
.muxed_cells_bank
145 pads
= {'N': pn
, 'S': ps
, 'E': pe
, 'W': pw
}
149 for (padnum
, name
, _
), bank
in zip(p
.muxed_cells
, p
.muxed_cells_bank
):
151 start
= p
.bankstart
[bank
]
152 banknum
= padnum
- start
153 print banknum
, name
, bank
156 if name
.startswith('vss'):
157 #name = 'p_vssick_' + name[-1]
162 elif name
.startswith('vdd'):
163 #name = 'p_vddick_' + name[-1]
168 elif name
.startswith('sys'):
169 if name
== 'sys_clk':
171 elif name
== 'sys_rst':
172 #name = 'p_sys_rst_1'
173 iopads
.append([name
, name
, name
])
174 padbank
[banknum
] = name
175 print "sys_rst add", bank
, banknum
, name
177 elif name
== 'sys_pllclk':
179 elif name
== 'sys_pllout':
180 name
= 'sys_pll_48_o'
181 iopads
.append(['p_' + name
, name
, name
])
182 elif name
.startswith('sys_csel'):
184 name2
= 'sys_clksel_i(%s)' % i
185 name
= 'p_sys_clksel_' + i
186 iopads
.append([name
, name2
, name2
])
188 # iopads.append([pname, name, name])
189 print "sys pad", name
191 elif name
.startswith('mspi0') or name
.startswith('mspi1'):
195 elif suffix
== 'nss':
197 if name
.startswith('mspi1'):
198 prefix
= 'spi_master_'
200 prefix
= 'spisdcard_'
201 name
= prefix
+ suffix
202 iopads
.append(['p_' + name
, name
, name
])
204 elif name
.startswith('sd0'):
205 if name
.startswith('sd0_d'):
207 name
= 'sdcard_data' + i
208 name2
= 'sdcard_data_%%s(%s)' % i
209 pad
= ['p_' + name
, name
, name2
% 'o', name2
% 'i',
212 elif name
.startswith('sd0_cmd'):
214 name2
= 'sdcard_cmd_%s'
215 pad
= ['p_' + name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
218 name
= 'sdcard_' + name
[4:]
219 iopads
.append(['p_' + name
, name
, name
])
221 elif name
.startswith('sdr'):
222 if name
== 'sdr_clk':
224 iopads
.append(['p_' + name
, name
, name
])
225 elif name
.startswith('sdr_ad'):
227 name
= 'sdram_a_' + i
228 name2
= 'sdram_a(%s)' % i
229 iopads
.append(['p_' + name
, name2
, name2
])
230 elif name
.startswith('sdr_ba'):
232 name
= 'sdram_ba_' + i
233 name2
= 'sdram_ba(%s)' % i
234 iopads
.append(['p_' + name
, name2
, name2
])
235 elif name
.startswith('sdr_dqm'):
237 name
= 'sdram_dm_' + i
238 name2
= 'sdram_dm(%s)' % i
239 iopads
.append(['p_' + name
, name2
, name2
])
240 elif name
.startswith('sdr_d'):
242 name
= 'sdram_dq_' + i
243 name2
= 'sdram_dq_%%s(%s)' % i
244 pad
= ['p_' + name
, name
, name2
% 'o', name2
% 'i', 'sdram_dq_oe']
246 elif name
== 'sdr_csn0':
248 iopads
.append(['p_' + name
, name
, name
])
249 elif name
[-1] == 'n':
250 name
= 'sdram_' + name
[4:-1] + '_n'
251 iopads
.append(['p_' + name
, name
, name
])
253 name
= 'sdram_' + name
[4:]
254 iopads
.append(['p_' + name
, name
, name
])
256 elif name
.startswith('uart'):
257 name
= 'uart_' + name
[6:]
258 iopads
.append(['p_' + name
, name
, name
])
260 elif name
.startswith('gpio'):
263 name2
= 'gpio_%%s(%s)' % i
264 pad
= ['p_' + name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
265 print ("GPIO pad", name
, pad
)
268 elif name
.startswith('twi'):
269 name
= 'i2c' + name
[3:]
270 if name
.startswith('i2c_sda'):
272 pad
= ['p_' + name
, name
, name2
% 'o', name2
% 'i', name2
% 'oe']
273 print ("I2C pad", name
, pad
)
276 iopads
.append(['p_' + name
, name
, name
])
278 elif name
.startswith('eint'):
281 name2
= 'eint(%s)' % i
282 pad
= ['p_' + name
, name2
, name2
]
285 elif name
.startswith('pwm'):
287 pad
= ['p_' + name
, name
, name
]
290 pad
= ['p_' + name
, name
, name
]
292 print ("GPIO pad", name
, pad
)
293 if name
and not name
.startswith('p_'):
296 padbank
[banknum
] = name
298 #pw[25] = 'p_sys_rst_1'
299 pe
[13] = 'p_vddeck_0'
300 pe
[23] = 'p_vsseck_0'
301 pw
[10] = 'p_vddick_0'
302 pw
[17] = 'p_vssick_0'
305 for pl
in [pe
, pw
, pn
, ps
]:
306 for i
in range(len(pl
)):
308 pl
[i
] = 'nc_%d' % nc_idx
322 'pads.instances' : iopads
325 chip
= json
.dumps(chip
)
326 with
open("ls180/litex_pinpads.json", "w") as f
: