src/spec/testing_stage1.py

   1 #!/usr/bin/env python3
   2 from nmigen.build.dsl import Resource, Subsignal, Pins
   3 from nmigen.build.plat import TemplatedPlatform
   4 from nmigen import Elaboratable, Signal, Module
   5 from collections import OrderedDict
   6
   7 # Was thinking of using these functions, but skipped for simplicity for now
   8 # XXX nope.  the output from JSON file.
   9 #from pinfunctions import (i2s, lpc, emmc, sdmmc, mspi, mquadspi, spi,
  10 # quadspi, i2c, mi2c, jtag, uart, uartfull, rgbttl, ulpi, rgmii, flexbus1,
  11 # flexbus2, sdram1, sdram2, sdram3, vss, vdd, sys, eint, pwm, gpio)
  12
  13 # File for stage 1 pinmux tested proposed by Luke,
  14 # https://bugs.libre-soc.org/show_bug.cgi?id=50#c10
  15
  16
  17 def dummy_pinset():
  18     # sigh this needs to come from pinmux.
  19     gpios = []
  20     for i in range(16):
  21         gpios.append("%d*" % i)
  22     return {'uart': ['tx+', 'rx-'],
  23             'gpio': gpios,
  24             'i2c': ['sda*', 'scl+']}
  25
  26 """
  27 a function is needed which turns the results of dummy_pinset()
  28 into:
  29
  30 [UARTResource("uart", 0, tx=..., rx=..),
  31  I2CResource("i2c", 0, scl=..., sda=...),
  32  Resource("gpio", 0, Subsignal("i"...), Subsignal("o"...)
  33  Resource("gpio", 1, Subsignal("i"...), Subsignal("o"...)
  34  ...
  35 ]
  36 """
  37
  38
  39 def create_resources(pinset):
  40     resources = []
  41     for periph, pins in pinset.items():
  42         print(periph, pins)
  43         if periph == 'i2c':
  44             #print("I2C required!")
  45             resources.append(I2CResource('i2c', 0, sda='sda', scl='scl'))
  46         elif periph == 'uart':
  47             #print("UART required!")
  48             resources.append(UARTResource('uart', 0, tx='tx', rx='rx'))
  49         elif periph == 'gpio':
  50             #print("GPIO required!")
  51             print ("GPIO is defined as '*' type, meaning i, o and oe needed")
  52             ios = []
  53             for pin in pins:
  54                 pname = "gpio"+pin[:-1] # strip "*" on end
  55                 ios.append(Subsignal(pname, Pins(pname, assert_width=1)))
  56             resources.append(Resource.family(periph, 0, default_name="gpio",
  57                                              ios=ios))
  58
  59     # add clock and reset
  60     resources.append(Resource("clk", 0, Pins("sys_clk", dir="i")))
  61     resources.append(Resource("rst", 0, Pins("sys_rst", dir="i")))
  62     return resources
  63
  64
  65 def UARTResource(*args, rx, tx):
  66     io = []
  67     io.append(Subsignal("rx", Pins(rx, dir="i", assert_width=1)))
  68     io.append(Subsignal("tx", Pins(tx, dir="o", assert_width=1)))
  69     return Resource.family(*args, default_name="uart", ios=io)
  70
  71
  72 def I2CResource(*args, scl, sda):
  73     io = []
  74     io.append(Subsignal("scl", Pins(scl, dir="io", assert_width=1)))
  75     io.append(Subsignal("sda", Pins(sda, dir="io", assert_width=1)))
  76     return Resource.family(*args, default_name="i2c", ios=io)
  77
  78
  79 # ridiculously-simple top-level module.  doesn't even have a sync domain
  80 # and can't have one until a clock has been established by DummyPlatform.
  81 class Blinker(Elaboratable):
  82     def __init__(self):
  83         pass
  84     def elaborate(self, platform):
  85         m = Module()
  86         count = Signal(5)
  87         m.d.sync += count.eq(5)
  88         print ("resources", platform.resources.items())
  89         gpio = platform.request("gpio", 0)
  90         print (gpio, gpio.layout, gpio.fields)
  91         # get the GPIO bank, mess about with some of the pins
  92         m.d.comb += gpio.gpio0.o.eq(1)
  93         m.d.comb += gpio.gpio1.o.eq(gpio.gpio2.i)
  94         # get the UART resource, mess with the output tx
  95         uart = platform.request("uart", 0)
  96         print (uart, uart.fields)
  97         m.d.comb += uart.tx.eq(1)
  98         return m
  99
 100
 101 '''
 102     _trellis_command_templates = [
 103         r"""
 104         {{invoke_tool("yosys")}}
 105             {{quiet("-q")}}
 106             {{get_override("yosys_opts")|options}}
 107             -l {{name}}.rpt
 108             {{name}}.ys
 109         """,
 110     ]
 111 '''
 112
 113 # sigh, have to create a dummy platform for now.
 114 # TODO: investigate how the heck to get it to output ilang. or verilog.
 115 # or, anything, really.  but at least it doesn't barf
 116 class DummyPlatform(TemplatedPlatform):
 117     connectors = []
 118     resources = OrderedDict()
 119     required_tools = []
 120     command_templates = ['/bin/true']
 121     file_templates = {
 122         **TemplatedPlatform.build_script_templates,
 123         "{{name}}.il": r"""
 124             # {{autogenerated}}
 125             {{emit_rtlil()}}
 126         """,
 127         "{{name}}.debug.v": r"""
 128             /* {{autogenerated}} */
 129             {{emit_debug_verilog()}}
 130         """,
 131     }
 132     toolchain = None
 133     default_clk = "clk" # should be picked up / overridden by platform sys.clk
 134     default_rst = "rst" # should be picked up / overridden by platform sys.rst
 135     def __init__(self, resources):
 136         super().__init__()
 137         self.add_resources(resources)
 138
 139 """
 140 and to create a Platform instance with that list, and build
 141 something random
 142
 143    p=Platform()
 144    p.resources=listofstuff
 145    p.build(Blinker())
 146 """
 147 pinset = dummy_pinset()
 148 resources = create_resources(pinset)
 149 print(pinset)
 150 print(resources)
 151 p = DummyPlatform (resources)
 152 p.build(Blinker())
 153