fix cell bit widths if muxwidth = 1
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 31 Jul 2018 07:20:30 +0000 (08:20 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 31 Jul 2018 07:20:30 +0000 (08:20 +0100)
commit0e07cd1c35e098cac02d0278ed18f1e3d8090352
tree0c95e1a11f22d98306c12df3424235d22f7ee1c7
parent0179d35e50fdba6b9a0c9bb3a77dfea16773d3e0
fix cell bit widths if muxwidth = 1
src/bsv/pinmux_generator.py
src/parse.py