2018-09-13 Andrew WatermanUpdate README master
2018-09-06 Tim NewsomeMerge pull request #235 from riscv/sba
2018-09-05 Tim NewsomeFix cut-and-paste bug in 64-bit SBA loads.
2018-08-24 Andrew WatermanHandle spike-dasm inputs with leading 0x correctly
2018-08-24 Tim NewsomeAdd dummy custom debug registers, to test OpenOCD....
2018-08-24 Andrew WatermanFix several disassembler bugs
2018-08-23 Andrew WatermanAdd --disable-dtb option to suppress writing the DTB...
2018-08-22 Andrew WatermanMake IRQ_COP read-only/undelegable unless coprocessor...
2018-08-21 Andrew WatermanInstantiate disassembler after max_xlen is known
2018-08-18 Andrew WatermanDon't increment instret immediately after it is written...
2018-08-10 Tim NewsomeFix 2 trigger corner cases. (#229)
2018-07-31 Andrew WatermanMake sstatus.MXR readable
2018-07-23 SeungRyeol LeeFix using the uninitialized disassemble object. (#220)
2018-07-10 Andrew WatermanRefactor and fix LR/SC implementation (#217)
2018-06-12 Tim NewsomeMerge pull request #212 from riscv/hartsel
2018-06-11 Tim NewsomeUpdate debug_defines.h
2018-05-31 Andy WrightPut simif_t declaration in its own file. (#209)
2018-05-18 Prashanth MundkurFix install of missed header. (#207)
2018-05-18 Prashanth MundkurExtract out device-tree generation and compilation...
2018-05-04 Andrew WatermanRevert "C.LWSP and C.LDSP with rd=0 are legal instructions"
2018-05-04 Andrew WatermanC.LWSP and C.LDSP with rd=0 are legal instructions
2018-05-01 Andrew WatermanFix commit log for serializing instructions
2018-04-30 Andrew WatermanOnly break out of the simulator loop on WFI, not on...
2018-04-29 Andrew WatermanWhen no arguments are passed, print spike help, not...
2018-04-05 Prashanth MundkurAllow querying the mmu configuration chosen during...
2018-04-04 Andrew WatermanRevert "Fix for issue #183: No illegal instruction...
2018-03-30 Palmer DabbeltMerge pull request #189 from pmundkur/pm-csr-name-api
2018-03-26 Prashanth MundkurAdd an api to get the name for a CSR.
2018-03-22 Andrew WatermanImplement Hauser misa.C misalignment proposal (#187)
2018-03-21 Prashanth MundkurFix the access exception during page-table walks to...
2018-03-19 Tim NewsomeFix spike-dasm. (#184)
2018-03-19 Tim NewsomeMerge pull request #182 from riscv/reset_bits
2018-03-16 Tim NewsomeImplement debug havereset bits
2018-03-16 Andrew WatermanMerge branch 'deepsrc-b_fix_issue183'
2018-03-16 Shubhodeep... Fix for issue #183: No illegal instruction exception...
2018-03-14 Prashanth MundkurFix a bug caused by moving misa into state_t. (#180)
2018-03-13 Prashanth MundkurMove processor.isa to state.misa, since it really belon...
2018-03-10 Tim NewsomeFix single stepping csrrw instructions (#178)
2018-03-08 Tim NewsomeMerge pull request #177 from riscv/debug_auth
2018-03-06 Prashanth MundkurNarrow the interface used by the processors and memory...
2018-03-06 Prashanth MundkurFix install of a missed header from debug_rom.
2018-03-06 Prashanth MundkurFix a missed header file in the softfloat include install.
2018-03-03 Andrew WatermanImplement clearing-misa.C-while-PC-is-misaligned proposal
2018-03-03 Andrew WatermanEnforce 2-byte alignment of mepc/sepc/dpc
2018-03-01 Tim NewsomeMerge pull request #173 from riscv/no_progbuf3
2018-02-27 Tim NewsomeAdd debug module authentication.
2018-02-21 Andrew WatermanDon't allow 32-bit instructions to take up multiple...
2018-02-19 Tim NewsomeMerge pull request #171 from riscv/sysbusbits
2018-02-19 Tim NewsomePasses smoke tests with --progsize=0
2018-02-19 Tim NewsomeWIP. Doesn't work.
2018-02-13 Andrew WatermanImplement cycleh/instreth CSRs for RV32 (#172)
2018-02-01 Tim NewsomeAdd --debug-sba option
2018-01-29 Tim NewsomeUpdate debug_defines
2018-01-18 Tim NewsomeSupport debug system bus access.
2018-01-09 Tim NewsomeUse new debug_defines.h.
2018-01-09 Jonathan Neuschäfermem_t: Throw an error if zero-sized memory is requested...
2018-01-03 Andrew WatermanAdd some missing RVC instructions to disassembler
2017-12-18 Tim NewsomeMerge pull request #165 from riscv/small_progbuf
2017-12-11 Tim NewsomeUpdate debug_defines to latest version.
2017-12-11 Tim NewsomeSet impebreak.
2017-12-11 Tim NewsomeUpdate to latest debug_defines.h.
2017-12-11 Tim NewsomeMake progbuf a run-time option.
2017-11-27 Andrew WatermanRename badaddr to tval
2017-11-27 Andrew WatermanRename sptbr to satp
2017-11-27 Andrew WatermanSet tval to 0 on traps with no specified tval
2017-11-20 Andrew WatermanImplement priv-1.11 interrupt-priority scheme (#161)
2017-11-20 Christopher... Fix commitlog. (#162)
2017-11-16 Andrew WatermanMerge pull request #156 from p12nGH/noncontiguous_harts
2017-11-15 Gleb Gagarinhartids knob description added
2017-11-15 Gleb GagarinSupport for non-contiguous hartids
2017-11-10 Andrew WatermanRemove redundant U/S mode advertisement
2017-11-10 Andrew WatermanH-mode no longer exists
2017-11-10 Andrew WatermanMPP is now WARL
2017-11-06 Kito ChengImplement Q extension for disassembler (#153)
2017-11-04 Andrew WatermanFix disassembly of c.li 0
2017-11-03 Palmer DabbeltMerge pull request #151 from riscv/htif_dts
2017-11-03 Palmer DabbeltPut HTIF in the device tree
2017-11-03 Andrew WatermanMask medeleg correctly
2017-11-02 Andrew WatermanDon't permit delegation of interrupts that M-mode shoul...
2017-10-20 Andrew WatermanFix commit-log for Q extension, and for RV32 (#143)
2017-10-19 Evan CoxFix bus_t bug with devices at 0x0
2017-10-19 Andrew WatermanFix implementation of FMIN/FMAX NaN case
2017-10-15 jarInclude math.h for NAN (#137)
2017-10-11 Andrew WatermanMerge pull request #129 from riscv/q-extension
2017-09-28 Andrew WatermanImplement Q extension
2017-09-25 Tim NewsomeMerge pull request #128 from riscv/reset
2017-09-25 Andrew WatermanUpdate SoftFloat
2017-09-21 Tim NewsomeActually let hartreset be set.
2017-09-21 Tim NewsomeFix debug reset.
2017-09-21 Tim NewsomeFix corner case in repeated execution (#127)
2017-09-21 Tim NewsomeFix comment typo. (#126)
2017-09-12 Tim NewsomeMerge pull request #123 from riscv/debug_interrupts
2017-09-12 Tim NewsomeDon't take interrupts while in Debug Mode.
2017-08-28 Tim NewsomeMerge pull request #121 from riscv/debug_store
2017-08-28 Tim NewsomeAdd a nice debug printf for debug_module_t::store
2017-08-11 Tim NewsomeMerge pull request #119 from riscv/quiet
2017-08-11 Tim NewsomeTurn off debug module debug printfs.
2017-08-10 Palmer DabbeltCorrect c.li and c.lui disassembly (#118)
2017-08-10 Tim NewsomeMerge pull request #117 from riscv/multicore_debug
2017-08-07 Tim NewsomeFix multicore debug.