ac5d9baaec567ca0e7f16d314f641be16e8ad74d
[riscv-tests.git] / benchmarks / common / crt.S
1 #include "pcr.h"
2
3 .data
4 .globl _heapend
5 .globl environ
6 _heapend:
7 .word 0
8 environ:
9 .word 0
10
11 .text
12 .globl _start
13
14 _start:
15 li x1, 0
16 li x2, 0
17 li x3, 0
18 li x4, 0
19 li x5, 0
20 li x6, 0
21 li x7, 0
22 li x8, 0
23 li x9, 0
24 li x10,0
25 li x11,0
26 li x12,0
27 li x13,0
28 li x14,0
29 li x15,0
30 li x16,0
31 li x17,0
32 li x18,0
33 li x19,0
34 li x20,0
35 li x21,0
36 li x22,0
37 li x23,0
38 li x24,0
39 li x25,0
40 li x26,0
41 li x27,0
42 li x28,0
43 li x29,0
44 li x30,0
45 li x31,0
46
47 # enable fp
48 setpcr status, SR_EF
49
50 # enable vec
51 setpcr t0, status, SR_EV
52
53 ## if that didn't stick, we don't have an FPU, so don't initialize it
54 and t0, t0, SR_EF
55 beqz t0, 1f
56
57 fssr x0
58 fmv.s.x f0, x0
59 fmv.s.x f1, x0
60 fmv.s.x f2, x0
61 fmv.s.x f3, x0
62 fmv.s.x f4, x0
63 fmv.s.x f5, x0
64 fmv.s.x f6, x0
65 fmv.s.x f7, x0
66 fmv.s.x f8, x0
67 fmv.s.x f9, x0
68 fmv.s.x f10,x0
69 fmv.s.x f11,x0
70 fmv.s.x f12,x0
71 fmv.s.x f13,x0
72 fmv.s.x f14,x0
73 fmv.s.x f15,x0
74 fmv.s.x f16,x0
75 fmv.s.x f17,x0
76 fmv.s.x f18,x0
77 fmv.s.x f19,x0
78 fmv.s.x f20,x0
79 fmv.s.x f21,x0
80 fmv.s.x f22,x0
81 fmv.s.x f23,x0
82 fmv.s.x f24,x0
83 fmv.s.x f25,x0
84 fmv.s.x f26,x0
85 fmv.s.x f27,x0
86 fmv.s.x f28,x0
87 fmv.s.x f29,x0
88 fmv.s.x f30,x0
89 fmv.s.x f31,x0
90 1:
91
92 # only allow core 0 to proceed
93 1:mfpcr a0, hartid
94 bnez a0, 1b
95
96 la sp,stacktop
97 jal main
98 1:b 1b
99
100 .bss
101 .globl stacktop
102
103 .align 4
104 .skip 131072
105 stacktop: