989d037ceb6c6e474a1eb8ebee1ed33d05355a04
[riscv-tests.git] / debug / programs / regs.S
1 #ifdef __riscv64
2 # define LREG ld
3 # define SREG sd
4 # define REGBYTES 8
5 #else
6 # define LREG lw
7 # define SREG sw
8 # define REGBYTES 4
9 #endif
10
11 #include "../../env/encoding.h"
12
13 .global main
14 main:
15 j main
16
17 write_regs:
18 SREG x1, 0(a0)
19 SREG x2, 8(a0)
20 SREG x3, 16(a0)
21 SREG x4, 24(a0)
22 SREG x5, 32(a0)
23 SREG x6, 40(a0)
24 SREG x7, 48(a0)
25 SREG x8, 56(a0)
26 SREG x9, 64(a0)
27 SREG x11, 72(a0)
28 SREG x12, 80(a0)
29 SREG x13, 88(a0)
30 SREG x14, 96(a0)
31 SREG x15, 104(a0)
32 SREG x16, 112(a0)
33 SREG x17, 120(a0)
34 SREG x18, 128(a0)
35 SREG x19, 136(a0)
36 SREG x20, 144(a0)
37 SREG x21, 152(a0)
38 SREG x22, 160(a0)
39 SREG x23, 168(a0)
40 SREG x24, 176(a0)
41 SREG x25, 184(a0)
42 SREG x26, 192(a0)
43 SREG x27, 200(a0)
44 SREG x28, 208(a0)
45 SREG x29, 216(a0)
46 SREG x30, 224(a0)
47 SREG x31, 232(a0)
48
49 csrr x1, CSR_MSCRATCH
50
51 all_done:
52 j all_done
53
54 .balign 16
55 data:
56 .fill 64, 8, 0