debug/targets.py

   1 import os.path
   2 import tempfile
   3
   4 import testlib
   5
   6 class Target(object):
   7     name = "name"
   8     xlen = 0
   9     directory = None
  10     timeout_sec = 2
  11     temporary_files = []
  12     temporary_binary = None
  13     openocd_config = []
  14     use_fpu = False
  15     misa = None
  16
  17     def __init__(self, cmd, run, isolate):
  18         self.cmd = cmd
  19         self.run = run
  20         self.isolate = isolate
  21
  22     def target(self):
  23         """Start the target, eg. a simulator."""
  24         pass
  25
  26     def server(self):
  27         """Start the debug server that gdb connects to, eg. OpenOCD."""
  28         if self.openocd_config:
  29             return testlib.Openocd(cmd=self.cmd, config=self.openocd_config)
  30         else:
  31             raise NotImplementedError
  32
  33     def compile(self, *sources):
  34         binary_name = "%s_%s-%d" % (
  35                 self.name,
  36                 os.path.basename(os.path.splitext(sources[0])[0]),
  37                 self.xlen)
  38         if self.isolate:
  39             self.temporary_binary = tempfile.NamedTemporaryFile(
  40                     prefix=binary_name + "_")
  41             binary_name = self.temporary_binary.name
  42             Target.temporary_files.append(self.temporary_binary)
  43         march = "rv%dima" % self.xlen
  44         if self.use_fpu:
  45             march += "fd"
  46         if self.extensionSupported("c"):
  47             march += "c"
  48         testlib.compile(sources +
  49                 ("programs/entry.S", "programs/init.c",
  50                     "-I", "../env",
  51                     "-march=%s" % march,
  52                     "-T", "targets/%s/link.lds" % (self.directory or self.name),
  53                     "-nostartfiles",
  54                     "-mcmodel=medany",
  55                     "-DXLEN=%d" % self.xlen,
  56                     "-o", binary_name),
  57                 xlen=self.xlen)
  58         return binary_name
  59
  60     def extensionSupported(self, letter):
  61         # target.misa is set by testlib.ExamineTarget
  62         return self.misa & (1 << (ord(letter.upper()) - ord('A')))
  63
  64 class SpikeTarget(Target):
  65     # pylint: disable=abstract-method
  66     directory = "spike"
  67     ram = 0x80010000
  68     ram_size = 5 * 1024 * 1024
  69     instruction_hardware_breakpoint_count = 4
  70     reset_vector = 0x1000
  71
  72 class Spike64Target(SpikeTarget):
  73     name = "spike64"
  74     xlen = 64
  75     use_fpu = True
  76
  77     def server(self):
  78         return testlib.Spike(self.cmd, halted=True)
  79
  80 class Spike32Target(SpikeTarget):
  81     name = "spike32"
  82     xlen = 32
  83
  84     def server(self):
  85         return testlib.Spike(self.cmd, halted=True, xlen=32)
  86
  87 class FreedomE300Target(Target):
  88     name = "freedom-e300"
  89     xlen = 32
  90     ram = 0x80000000
  91     ram_size = 16 * 1024
  92     instruction_hardware_breakpoint_count = 2
  93     openocd_config = "targets/%s/openocd.cfg" % name
  94
  95 class HiFive1Target(FreedomE300Target):
  96     name = "HiFive1"
  97     openocd_config = "targets/%s/openocd.cfg" % name
  98
  99 class FreedomE300SimTarget(Target):
 100     name = "freedom-e300-sim"
 101     xlen = 32
 102     timeout_sec = 240
 103     ram = 0x80000000
 104     ram_size = 256 * 1024 * 1024
 105     instruction_hardware_breakpoint_count = 2
 106     openocd_config = "targets/%s/openocd.cfg" % name
 107
 108     def target(self):
 109         return testlib.VcsSim(simv=self.run, debug=False)
 110
 111 class FreedomU500Target(Target):
 112     name = "freedom-u500"
 113     xlen = 64
 114     ram = 0x80000000
 115     ram_size = 16 * 1024
 116     instruction_hardware_breakpoint_count = 2
 117     openocd_config = "targets/%s/openocd.cfg" % name
 118
 119 class FreedomU500SimTarget(Target):
 120     name = "freedom-u500-sim"
 121     xlen = 64
 122     timeout_sec = 240
 123     ram = 0x80000000
 124     ram_size = 256 * 1024 * 1024
 125     instruction_hardware_breakpoint_count = 2
 126     openocd_config = "targets/%s/openocd.cfg" % name
 127
 128     def target(self):
 129         return testlib.VcsSim(simv=self.run, debug=False)
 130
 131 targets = [
 132         Spike32Target,
 133         Spike64Target,
 134         FreedomE300Target,
 135         FreedomU500Target,
 136         FreedomE300SimTarget,
 137         FreedomU500SimTarget,
 138         HiFive1Target]
 139
 140 def add_target_options(parser):
 141     group = parser.add_mutually_exclusive_group(required=True)
 142     for t in targets:
 143         group.add_argument("--%s" % t.name, action="store_const", const=t,
 144                 dest="target")
 145     parser.add_argument("--run",
 146             help="The command to use to start the actual target (e.g. "
 147             "simulation)")
 148     parser.add_argument("--cmd",
 149             help="The command to use to start the debug server.")
 150
 151     xlen_group = parser.add_mutually_exclusive_group()
 152     xlen_group.add_argument("--32", action="store_const", const=32, dest="xlen",
 153             help="Force the target to be 32-bit.")
 154     xlen_group.add_argument("--64", action="store_const", const=64, dest="xlen",
 155             help="Force the target to be 64-bit.")
 156
 157     parser.add_argument("--isolate", action="store_true",
 158             help="Try to run in such a way that multiple instances can run at "
 159             "the same time. This may make it harder to debug a failure if it "
 160             "does occur.")