We *do* need the FPU to compile 64-bit code.
[riscv-tests.git] / debug / targets.py
1 import os.path
2 import tempfile
3
4 import testlib
5
6 class Target(object):
7 name = "name"
8 xlen = 0
9 directory = None
10 timeout_sec = 2
11 temporary_files = []
12 temporary_binary = None
13 openocd_config = []
14 use_fpu = False
15
16 def __init__(self, cmd, run, isolate):
17 self.cmd = cmd
18 self.run = run
19 self.isolate = isolate
20
21 def target(self):
22 """Start the target, eg. a simulator."""
23 pass
24
25 def server(self):
26 """Start the debug server that gdb connects to, eg. OpenOCD."""
27 if self.openocd_config:
28 return testlib.Openocd(cmd=self.cmd, config=self.openocd_config)
29 else:
30 raise NotImplementedError
31
32 def compile(self, *sources):
33 binary_name = "%s_%s-%d" % (
34 self.name,
35 os.path.basename(os.path.splitext(sources[0])[0]),
36 self.xlen)
37 if self.isolate:
38 self.temporary_binary = tempfile.NamedTemporaryFile(
39 prefix=binary_name + "_")
40 binary_name = self.temporary_binary.name
41 Target.temporary_files.append(self.temporary_binary)
42 march = "RV%dIMA" % self.xlen
43 if self.use_fpu:
44 march += "FD"
45 testlib.compile(sources +
46 ("programs/entry.S", "programs/init.c",
47 "-I", "../env",
48 "-march=%s" % march,
49 "-T", "targets/%s/link.lds" % (self.directory or self.name),
50 "-nostartfiles",
51 "-mcmodel=medany",
52 "-o", binary_name),
53 xlen=self.xlen)
54 return binary_name
55
56 class SpikeTarget(Target):
57 # pylint: disable=abstract-method
58 directory = "spike"
59 ram = 0x80010000
60 ram_size = 5 * 1024 * 1024
61 instruction_hardware_breakpoint_count = 4
62 reset_vector = 0x1000
63
64 class Spike64Target(SpikeTarget):
65 name = "spike64"
66 xlen = 64
67 use_fpu = True
68
69 def server(self):
70 return testlib.Spike(self.cmd, halted=True)
71
72 class Spike32Target(SpikeTarget):
73 name = "spike32"
74 xlen = 32
75
76 def server(self):
77 return testlib.Spike(self.cmd, halted=True, xlen=32)
78
79 class FreedomE300Target(Target):
80 name = "freedom-e300"
81 xlen = 32
82 ram = 0x80000000
83 ram_size = 16 * 1024
84 instruction_hardware_breakpoint_count = 2
85 openocd_config = "targets/%s/openocd.cfg" % name
86
87 class FreedomE300SimTarget(Target):
88 name = "freedom-e300-sim"
89 xlen = 32
90 timeout_sec = 240
91 ram = 0x80000000
92 ram_size = 256 * 1024 * 1024
93 instruction_hardware_breakpoint_count = 2
94 openocd_config = "targets/%s/openocd.cfg" % name
95
96 def target(self):
97 return testlib.VcsSim(simv=self.run, debug=False)
98
99 class FreedomU500Target(Target):
100 name = "freedom-u500"
101 xlen = 64
102 ram = 0x80000000
103 ram_size = 16 * 1024
104 instruction_hardware_breakpoint_count = 2
105 openocd_config = "targets/%s/openocd.cfg" % name
106
107 class FreedomU500SimTarget(Target):
108 name = "freedom-u500-sim"
109 xlen = 64
110 timeout_sec = 240
111 ram = 0x80000000
112 ram_size = 256 * 1024 * 1024
113 instruction_hardware_breakpoint_count = 2
114 openocd_config = "targets/%s/openocd.cfg" % name
115
116 def target(self):
117 return testlib.VcsSim(simv=self.run, debug=False)
118
119 targets = [
120 Spike32Target,
121 Spike64Target,
122 FreedomE300Target,
123 FreedomU500Target,
124 FreedomE300SimTarget,
125 FreedomU500SimTarget]
126
127 def add_target_options(parser):
128 group = parser.add_mutually_exclusive_group(required=True)
129 for t in targets:
130 group.add_argument("--%s" % t.name, action="store_const", const=t,
131 dest="target")
132 parser.add_argument("--run",
133 help="The command to use to start the actual target (e.g. "
134 "simulation)")
135 parser.add_argument("--cmd",
136 help="The command to use to start the debug server.")
137
138 xlen_group = parser.add_mutually_exclusive_group()
139 xlen_group.add_argument("--32", action="store_const", const=32, dest="xlen",
140 help="Force the target to be 32-bit.")
141 xlen_group.add_argument("--64", action="store_const", const=64, dest="xlen",
142 help="Force the target to be 64-bit.")
143
144 parser.add_argument("--isolate", action="store_true",
145 help="Try to run in such a way that multiple instances can run at "
146 "the same time. This may make it harder to debug a failure if it "
147 "does occur.")