e8edda4e6c660392c0deb3913c5fdb30d12b0f5c
[riscv-tests.git] / debug / targets / freedom-e300-sim / openocd.cfg
1 adapter_khz 10000
2
3 source [find interface/jtag_vpi.cfg]
4
5 set _CHIPNAME riscv
6 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
7
8 set _TARGETNAME $_CHIPNAME.cpu
9 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
10
11 init
12
13 halt