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[riscv-tests.git] / env / pt / riscv_test.h
1 #ifndef _ENV_PHYSICAL_SINGLE_CORE_TIMER_H
2 #define _ENV_PHYSICAL_SINGLE_CORE_TIMER_H
3
4 #include "pcr.h"
5
6 //-----------------------------------------------------------------------
7 // Begin Macro
8 //-----------------------------------------------------------------------
9
10 #define RVTEST_RV64U \
11
12 #define RVTEST_FP_ENABLE \
13 setpcr cr0, 2; \
14 mfpcr a0, cr0; \
15 and a0, a0, 2; \
16 beqz a0, 1f; \
17 mtfsr x0; \
18 1:
19
20 #define RVTEST_PASS_NOFP \
21 RVTEST_FP_ENABLE \
22 bnez a0, 2f; \
23 RVTEST_PASS \
24 2: \
25
26 #define RVTEST_VEC_ENABLE \
27 mfpcr a0, cr0; \
28 ori a0, a0, 4; \
29 mtpcr a0, cr0; \
30 li a0, 0xff; \
31 mtpcr a0, cr18; \
32
33 #define RVTEST_CODE_BEGIN \
34 .text; \
35 .align 4; \
36 .global _start; \
37 _start: \
38 RVTEST_FP_ENABLE \
39 RVTEST_VEC_ENABLE \
40 mfpcr a0, cr10; 1: bnez a0, 1b; \
41 ENABLE_TIMER_INTERRUPT \
42
43 //-----------------------------------------------------------------------
44 // End Macro
45 //-----------------------------------------------------------------------
46
47 #define RVTEST_CODE_END \
48 XCPT_HANDLER \
49
50 //-----------------------------------------------------------------------
51 // Pass/Fail Macro
52 //-----------------------------------------------------------------------
53
54 #define RVTEST_PASS \
55 fence; \
56 li x1, 1; \
57 mtpcr x1, cr30; \
58 1: b 1b; \
59
60 #define RVTEST_FAIL \
61 fence; \
62 beqz x28, 1f; \
63 sll x28, x28, 1; \
64 or x28, x28, 1; \
65 mtpcr x28, cr30; \
66 1: b 1b; \
67
68 //-----------------------------------------------------------------------
69 // Data Section Macro
70 //-----------------------------------------------------------------------
71
72 #define RVTEST_DATA_BEGIN \
73 .align 3; \
74 regspill: \
75 .dword 0xdeadbeefcafebabe; \
76 .dword 0xdeadbeefcafebabe; \
77 .dword 0xdeadbeefcafebabe; \
78 .dword 0xdeadbeefcafebabe; \
79 .dword 0xdeadbeefcafebabe; \
80 .dword 0xdeadbeefcafebabe; \
81 .dword 0xdeadbeefcafebabe; \
82 .dword 0xdeadbeefcafebabe; \
83 .dword 0xdeadbeefcafebabe; \
84 .dword 0xdeadbeefcafebabe; \
85 .dword 0xdeadbeefcafebabe; \
86 .dword 0xdeadbeefcafebabe; \
87 .dword 0xdeadbeefcafebabe; \
88 .dword 0xdeadbeefcafebabe; \
89 .dword 0xdeadbeefcafebabe; \
90 .dword 0xdeadbeefcafebabe; \
91 .dword 0xdeadbeefcafebabe; \
92 .dword 0xdeadbeefcafebabe; \
93 .dword 0xdeadbeefcafebabe; \
94 .dword 0xdeadbeefcafebabe; \
95 .dword 0xdeadbeefcafebabe; \
96 .dword 0xdeadbeefcafebabe; \
97 .dword 0xdeadbeefcafebabe; \
98 .dword 0xdeadbeefcafebabe; \
99 evac: \
100 .dword 0xdeadbeefcafebabe; \
101 .dword 0xdeadbeefcafebabe; \
102 .dword 0xdeadbeefcafebabe; \
103 .dword 0xdeadbeefcafebabe; \
104 .dword 0xdeadbeefcafebabe; \
105 .dword 0xdeadbeefcafebabe; \
106 .dword 0xdeadbeefcafebabe; \
107 .dword 0xdeadbeefcafebabe; \
108 .dword 0xdeadbeefcafebabe; \
109 .dword 0xdeadbeefcafebabe; \
110 .dword 0xdeadbeefcafebabe; \
111 .dword 0xdeadbeefcafebabe; \
112 .dword 0xdeadbeefcafebabe; \
113 .dword 0xdeadbeefcafebabe; \
114 .dword 0xdeadbeefcafebabe; \
115 .dword 0xdeadbeefcafebabe; \
116 .dword 0xdeadbeefcafebabe; \
117 .dword 0xdeadbeefcafebabe; \
118 .dword 0xdeadbeefcafebabe; \
119 .dword 0xdeadbeefcafebabe; \
120 .dword 0xdeadbeefcafebabe; \
121 .dword 0xdeadbeefcafebabe; \
122 .dword 0xdeadbeefcafebabe; \
123 .dword 0xdeadbeefcafebabe; \
124 .dword 0xdeadbeefcafebabe; \
125 .dword 0xdeadbeefcafebabe; \
126 .dword 0xdeadbeefcafebabe; \
127 .dword 0xdeadbeefcafebabe; \
128 .dword 0xdeadbeefcafebabe; \
129 .dword 0xdeadbeefcafebabe; \
130 .dword 0xdeadbeefcafebabe; \
131 .dword 0xdeadbeefcafebabe; \
132
133 #define RVTEST_DATA_END
134
135 //#define RVTEST_DATA_BEGIN .align 4; .global begin_signature; begin_signature:
136 //#define RVTEST_DATA_END .align 4; .global end_signature; end_signature:
137
138 //-----------------------------------------------------------------------
139 // Misc
140 //-----------------------------------------------------------------------
141
142 #define ENABLE_TIMER_INTERRUPT \
143 mtpcr x0,ASM_CR(PCR_CLR_IPI);\
144 mfpcr a0,ASM_CR(PCR_SR); \
145 li a1, SR_ET|SR_IM; \
146 or a0,a0,a1; \
147 mtpcr a0,ASM_CR(PCR_SR); \
148 la a0,handler; \
149 mtpcr a0,ASM_CR(PCR_EVEC); \
150 mtpcr x0,ASM_CR(PCR_COUNT); \
151 addi a0,x0,60; \
152 mtpcr a0,ASM_CR(PCR_COMPARE);\
153
154 #define XCPT_HANDLER \
155 handler: \
156 mtpcr a0,ASM_CR(PCR_K0); \
157 mtpcr a1,ASM_CR(PCR_K1); \
158 la a0,regspill; \
159 sd a2,0(a0); \
160 sd a3,8(a0); \
161 sd a4,16(a0); \
162 sd a5,24(a0); \
163 sd s0,32(a0); \
164 sd s1,40(a0); \
165 mfpcr s1,ASM_CR(PCR_VECBANK);\
166 mfpcr s0,ASM_CR(PCR_VECCFG); \
167 la a0,evac; \
168 vxcptevac a0; \
169 mtpcr s1,ASM_CR(PCR_VECBANK);\
170 srli a1,s0,12; \
171 andi a1,a1,0x3f; \
172 srli a2,s0,18; \
173 andi a2,a2,0x3f; \
174 vvcfg a1,a2; \
175 li a2,0xfff; \
176 and a1,s0,a2; \
177 vsetvl a1,a1; \
178 vxcpthold; \
179 li a5,0; \
180 handler_loop: \
181 ld a1,0(a0); \
182 addi a0,a0,8; \
183 blt a1,x0,done; \
184 srli a2,a1,32; \
185 andi a2,a2,0x1; \
186 beq a2,x0,vcnt; \
187 vcmd: \
188 beq a5,x0,vcmd_skip; \
189 venqcmd a4,a3; \
190 vcmd_skip: \
191 li a5,1; \
192 move a4,a1; \
193 srli a3,a4,36; \
194 andi a3,a3,0x1; \
195 vimm1: \
196 srli a2,a4,35; \
197 andi a2,a2,0x1; \
198 beq a2,x0,vimm2; \
199 ld a1,0(a0); \
200 addi a0,a0,8; \
201 venqimm1 a1,a3; \
202 vimm2: \
203 srli a2,a4,34; \
204 andi a2,a2,0x1; \
205 beq a2,x0,end; \
206 ld a1,0(a0); \
207 addi a0,a0,8; \
208 venqimm2 a1,a3; \
209 j end; \
210 vcnt: \
211 ld a2,0(a0); \
212 srli a2,a2,31; \
213 andi a2,a2,0x2; \
214 or a3,a3,a2; \
215 venqcnt a1,a3; \
216 end: \
217 j handler_loop; \
218 done: \
219 beq a5,x0,done_skip; \
220 venqcmd a4,a3; \
221 done_skip: \
222 la a0,regspill; \
223 ld a2,0(a0); \
224 ld a3,8(a0); \
225 ld a4,16(a0); \
226 ld a5,24(a0); \
227 ld s0,32(a0); \
228 ld s1,40(a0); \
229 mfpcr a0,ASM_CR(PCR_COUNT); \
230 addi a0,a0,60; \
231 mtpcr a0,ASM_CR(PCR_COMPARE);\
232 mfpcr a0,ASM_CR(PCR_K0); \
233 mfpcr a1,ASM_CR(PCR_K1); \
234 eret; \
235
236 #endif