cd7d21d1385c262e4ade9e7dc4cff37b3022d72f
[riscv-tests.git] / isa / macros / scalar / test_macros.h
1 // See LICENSE for license details.
2
3 #ifndef __TEST_MACROS_SCALAR_H
4 #define __TEST_MACROS_SCALAR_H
5
6
7 #-----------------------------------------------------------------------
8 # Helper macros
9 #-----------------------------------------------------------------------
10
11 #define MASK_XLEN(x) ((x) & ((1 << (__riscv_xlen - 1) << 1) - 1))
12
13 #define TEST_CASE( testnum, testreg, correctval, code... ) \
14 test_ ## testnum: \
15 code; \
16 li x29, MASK_XLEN(correctval); \
17 li TESTNUM, testnum; \
18 bne testreg, x29, fail;
19
20 # We use a macro hack to simpify code generation for various numbers
21 # of bubble cycles.
22
23 #define TEST_INSERT_NOPS_0
24 #define TEST_INSERT_NOPS_1 nop; TEST_INSERT_NOPS_0
25 #define TEST_INSERT_NOPS_2 nop; TEST_INSERT_NOPS_1
26 #define TEST_INSERT_NOPS_3 nop; TEST_INSERT_NOPS_2
27 #define TEST_INSERT_NOPS_4 nop; TEST_INSERT_NOPS_3
28 #define TEST_INSERT_NOPS_5 nop; TEST_INSERT_NOPS_4
29 #define TEST_INSERT_NOPS_6 nop; TEST_INSERT_NOPS_5
30 #define TEST_INSERT_NOPS_7 nop; TEST_INSERT_NOPS_6
31 #define TEST_INSERT_NOPS_8 nop; TEST_INSERT_NOPS_7
32 #define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
33 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
34
35
36 #-----------------------------------------------------------------------
37 # RV64UI MACROS
38 #-----------------------------------------------------------------------
39
40 #-----------------------------------------------------------------------
41 # Tests for instructions with immediate operand
42 #-----------------------------------------------------------------------
43
44 #define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
45
46 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
47 TEST_CASE( testnum, x3, result, \
48 li x1, MASK_XLEN(val1); \
49 inst x3, x1, SEXT_IMM(imm); \
50 )
51
52 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
53 TEST_CASE( testnum, x1, result, \
54 li x1, MASK_XLEN(val1); \
55 inst x1, x1, SEXT_IMM(imm); \
56 )
57
58 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
59 TEST_CASE( testnum, x6, result, \
60 li x4, 0; \
61 1: li x1, MASK_XLEN(val1); \
62 inst x3, x1, SEXT_IMM(imm); \
63 TEST_INSERT_NOPS_ ## nop_cycles \
64 addi x6, x3, 0; \
65 addi x4, x4, 1; \
66 li x5, 2; \
67 bne x4, x5, 1b \
68 )
69
70 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
71 TEST_CASE( testnum, x3, result, \
72 li x4, 0; \
73 1: li x1, MASK_XLEN(val1); \
74 TEST_INSERT_NOPS_ ## nop_cycles \
75 inst x3, x1, SEXT_IMM(imm); \
76 addi x4, x4, 1; \
77 li x5, 2; \
78 bne x4, x5, 1b \
79 )
80
81 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
82 TEST_CASE( testnum, x1, result, \
83 inst x1, x0, SEXT_IMM(imm); \
84 )
85
86 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
87 TEST_CASE( testnum, x0, 0, \
88 li x1, MASK_XLEN(val1); \
89 inst x0, x1, SEXT_IMM(imm); \
90 )
91
92 #-----------------------------------------------------------------------
93 # Tests for vector config instructions
94 #-----------------------------------------------------------------------
95
96 #define TEST_VSETCFGIVL( testnum, nxpr, nfpr, bank, vl, result ) \
97 TEST_CASE( testnum, x1, result, \
98 li x1, (bank << 12); \
99 vsetcfg x1,nxpr,nfpr; \
100 li x1, vl; \
101 vsetvl x1,x1; \
102 )
103
104 #define TEST_VVCFG( testnum, nxpr, nfpr, bank, vl, result ) \
105 TEST_CASE( testnum, x1, result, \
106 li x1, (bank << 12) | (nfpr << 6) | nxpr; \
107 vsetcfg x1; \
108 li x1, vl; \
109 vsetvl x1,x1; \
110 )
111
112 #define TEST_VSETVL( testnum, nxpr, nfpr, bank, vl, result ) \
113 TEST_CASE( testnum, x1, result, \
114 li x1, (bank << 12); \
115 vsetcfg x1,nxpr,nfpr; \
116 li x1, vl; \
117 vsetvl x1, x1; \
118 )
119
120 #-----------------------------------------------------------------------
121 # Tests for an instruction with register operands
122 #-----------------------------------------------------------------------
123
124 #define TEST_R_OP( testnum, inst, result, val1 ) \
125 TEST_CASE( testnum, x3, result, \
126 li x1, val1; \
127 inst x3, x1; \
128 )
129
130 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
131 TEST_CASE( testnum, x1, result, \
132 li x1, val1; \
133 inst x1, x1; \
134 )
135
136 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
137 TEST_CASE( testnum, x6, result, \
138 li x4, 0; \
139 1: li x1, val1; \
140 inst x3, x1; \
141 TEST_INSERT_NOPS_ ## nop_cycles \
142 addi x6, x3, 0; \
143 addi x4, x4, 1; \
144 li x5, 2; \
145 bne x4, x5, 1b \
146 )
147
148 #-----------------------------------------------------------------------
149 # Tests for an instruction with register-register operands
150 #-----------------------------------------------------------------------
151
152 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
153 TEST_CASE( testnum, x3, result, \
154 li x1, MASK_XLEN(val1); \
155 li x2, MASK_XLEN(val2); \
156 inst x3, x1, x2; \
157 )
158
159 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
160 TEST_CASE( testnum, x1, result, \
161 li x1, MASK_XLEN(val1); \
162 li x2, MASK_XLEN(val2); \
163 inst x1, x1, x2; \
164 )
165
166 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
167 TEST_CASE( testnum, x2, result, \
168 li x1, MASK_XLEN(val1); \
169 li x2, MASK_XLEN(val2); \
170 inst x2, x1, x2; \
171 )
172
173 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
174 TEST_CASE( testnum, x1, result, \
175 li x1, MASK_XLEN(val1); \
176 inst x1, x1, x1; \
177 )
178
179 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
180 TEST_CASE( testnum, x6, result, \
181 li x4, 0; \
182 1: li x1, MASK_XLEN(val1); \
183 li x2, MASK_XLEN(val2); \
184 inst x3, x1, x2; \
185 TEST_INSERT_NOPS_ ## nop_cycles \
186 addi x6, x3, 0; \
187 addi x4, x4, 1; \
188 li x5, 2; \
189 bne x4, x5, 1b \
190 )
191
192 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
193 TEST_CASE( testnum, x3, result, \
194 li x4, 0; \
195 1: li x1, MASK_XLEN(val1); \
196 TEST_INSERT_NOPS_ ## src1_nops \
197 li x2, MASK_XLEN(val2); \
198 TEST_INSERT_NOPS_ ## src2_nops \
199 inst x3, x1, x2; \
200 addi x4, x4, 1; \
201 li x5, 2; \
202 bne x4, x5, 1b \
203 )
204
205 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
206 TEST_CASE( testnum, x3, result, \
207 li x4, 0; \
208 1: li x2, MASK_XLEN(val2); \
209 TEST_INSERT_NOPS_ ## src1_nops \
210 li x1, MASK_XLEN(val1); \
211 TEST_INSERT_NOPS_ ## src2_nops \
212 inst x3, x1, x2; \
213 addi x4, x4, 1; \
214 li x5, 2; \
215 bne x4, x5, 1b \
216 )
217
218 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
219 TEST_CASE( testnum, x2, result, \
220 li x1, MASK_XLEN(val); \
221 inst x2, x0, x1; \
222 )
223
224 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
225 TEST_CASE( testnum, x2, result, \
226 li x1, MASK_XLEN(val); \
227 inst x2, x1, x0; \
228 )
229
230 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
231 TEST_CASE( testnum, x1, result, \
232 inst x1, x0, x0; \
233 )
234
235 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
236 TEST_CASE( testnum, x0, 0, \
237 li x1, MASK_XLEN(val1); \
238 li x2, MASK_XLEN(val2); \
239 inst x0, x1, x2; \
240 )
241
242 #-----------------------------------------------------------------------
243 # Test memory instructions
244 #-----------------------------------------------------------------------
245
246 #define TEST_LD_OP( testnum, inst, result, offset, base ) \
247 TEST_CASE( testnum, x3, result, \
248 la x1, base; \
249 inst x3, offset(x1); \
250 )
251
252 #define TEST_ST_OP( testnum, load_inst, store_inst, result, offset, base ) \
253 TEST_CASE( testnum, x3, result, \
254 la x1, base; \
255 li x2, result; \
256 store_inst x2, offset(x1); \
257 load_inst x3, offset(x1); \
258 )
259
260 #define TEST_LD_DEST_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
261 test_ ## testnum: \
262 li TESTNUM, testnum; \
263 li x4, 0; \
264 1: la x1, base; \
265 inst x3, offset(x1); \
266 TEST_INSERT_NOPS_ ## nop_cycles \
267 addi x6, x3, 0; \
268 li x29, result; \
269 bne x6, x29, fail; \
270 addi x4, x4, 1; \
271 li x5, 2; \
272 bne x4, x5, 1b; \
273
274 #define TEST_LD_SRC1_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
275 test_ ## testnum: \
276 li TESTNUM, testnum; \
277 li x4, 0; \
278 1: la x1, base; \
279 TEST_INSERT_NOPS_ ## nop_cycles \
280 inst x3, offset(x1); \
281 li x29, result; \
282 bne x3, x29, fail; \
283 addi x4, x4, 1; \
284 li x5, 2; \
285 bne x4, x5, 1b \
286
287 #define TEST_ST_SRC12_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
288 test_ ## testnum: \
289 li TESTNUM, testnum; \
290 li x4, 0; \
291 1: li x1, result; \
292 TEST_INSERT_NOPS_ ## src1_nops \
293 la x2, base; \
294 TEST_INSERT_NOPS_ ## src2_nops \
295 store_inst x1, offset(x2); \
296 load_inst x3, offset(x2); \
297 li x29, result; \
298 bne x3, x29, fail; \
299 addi x4, x4, 1; \
300 li x5, 2; \
301 bne x4, x5, 1b \
302
303 #define TEST_ST_SRC21_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
304 test_ ## testnum: \
305 li TESTNUM, testnum; \
306 li x4, 0; \
307 1: la x2, base; \
308 TEST_INSERT_NOPS_ ## src1_nops \
309 li x1, result; \
310 TEST_INSERT_NOPS_ ## src2_nops \
311 store_inst x1, offset(x2); \
312 load_inst x3, offset(x2); \
313 li x29, result; \
314 bne x3, x29, fail; \
315 addi x4, x4, 1; \
316 li x5, 2; \
317 bne x4, x5, 1b \
318
319 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2 ) \
320 test_ ## testnum: \
321 li TESTNUM, testnum; \
322 li x1, val1; \
323 li x2, val2; \
324 inst x1, x2, 2f; \
325 bne x0, TESTNUM, fail; \
326 1: bne x0, TESTNUM, 3f; \
327 2: inst x1, x2, 1b; \
328 bne x0, TESTNUM, fail; \
329 3:
330
331 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
332 test_ ## testnum: \
333 li TESTNUM, testnum; \
334 li x1, val1; \
335 li x2, val2; \
336 inst x1, x2, 1f; \
337 bne x0, TESTNUM, 2f; \
338 1: bne x0, TESTNUM, fail; \
339 2: inst x1, x2, 1b; \
340 3:
341
342 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
343 test_ ## testnum: \
344 li TESTNUM, testnum; \
345 li x4, 0; \
346 1: li x1, val1; \
347 TEST_INSERT_NOPS_ ## src1_nops \
348 li x2, val2; \
349 TEST_INSERT_NOPS_ ## src2_nops \
350 inst x1, x2, fail; \
351 addi x4, x4, 1; \
352 li x5, 2; \
353 bne x4, x5, 1b \
354
355 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
356 test_ ## testnum: \
357 li TESTNUM, testnum; \
358 li x4, 0; \
359 1: li x2, val2; \
360 TEST_INSERT_NOPS_ ## src1_nops \
361 li x1, val1; \
362 TEST_INSERT_NOPS_ ## src2_nops \
363 inst x1, x2, fail; \
364 addi x4, x4, 1; \
365 li x5, 2; \
366 bne x4, x5, 1b \
367
368 #-----------------------------------------------------------------------
369 # Test jump instructions
370 #-----------------------------------------------------------------------
371
372 #define TEST_JR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
373 test_ ## testnum: \
374 li TESTNUM, testnum; \
375 li x4, 0; \
376 1: la x6, 2f; \
377 TEST_INSERT_NOPS_ ## nop_cycles \
378 inst x6; \
379 bne x0, TESTNUM, fail; \
380 2: addi x4, x4, 1; \
381 li x5, 2; \
382 bne x4, x5, 1b \
383
384 #define TEST_JALR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
385 test_ ## testnum: \
386 li TESTNUM, testnum; \
387 li x4, 0; \
388 1: la x6, 2f; \
389 TEST_INSERT_NOPS_ ## nop_cycles \
390 inst x19, x6, 0; \
391 bne x0, TESTNUM, fail; \
392 2: addi x4, x4, 1; \
393 li x5, 2; \
394 bne x4, x5, 1b \
395
396
397 #-----------------------------------------------------------------------
398 # RV64UF MACROS
399 #-----------------------------------------------------------------------
400
401 #-----------------------------------------------------------------------
402 # Tests floating-point instructions
403 #-----------------------------------------------------------------------
404
405 #define TEST_FP_OP_S_INTERNAL( testnum, flags, result, val1, val2, val3, code... ) \
406 test_ ## testnum: \
407 li TESTNUM, testnum; \
408 la a0, test_ ## testnum ## _data ;\
409 flw f0, 0(a0); \
410 flw f1, 4(a0); \
411 flw f2, 8(a0); \
412 lw a3, 12(a0); \
413 code; \
414 fsflags a1, x0; \
415 li a2, flags; \
416 bne a0, a3, fail; \
417 bne a1, a2, fail; \
418 .pushsection .data; \
419 .align 2; \
420 test_ ## testnum ## _data: \
421 .float val1; \
422 .float val2; \
423 .float val3; \
424 .result; \
425 .popsection
426
427 #define TEST_FP_OP_D_INTERNAL( testnum, flags, result, val1, val2, val3, code... ) \
428 test_ ## testnum: \
429 li TESTNUM, testnum; \
430 la a0, test_ ## testnum ## _data ;\
431 fld f0, 0(a0); \
432 fld f1, 8(a0); \
433 fld f2, 16(a0); \
434 ld a3, 24(a0); \
435 code; \
436 fsflags a1, x0; \
437 li a2, flags; \
438 bne a0, a3, fail; \
439 bne a1, a2, fail; \
440 .pushsection .data; \
441 .align 3; \
442 test_ ## testnum ## _data: \
443 .double val1; \
444 .double val2; \
445 .double val3; \
446 .result; \
447 .popsection
448
449 #define TEST_FCVT_S_D( testnum, result, val1 ) \
450 TEST_FP_OP_D_INTERNAL( testnum, 0, double result, val1, 0.0, 0.0, \
451 fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d a0, f3)
452
453 #define TEST_FCVT_D_S( testnum, result, val1 ) \
454 TEST_FP_OP_S_INTERNAL( testnum, 0, float result, val1, 0.0, 0.0, \
455 fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s a0, f3)
456
457 #define TEST_FP_OP1_S( testnum, inst, flags, result, val1 ) \
458 TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, 0.0, 0.0, \
459 inst f3, f0; fmv.x.s a0, f3)
460
461 #define TEST_FP_OP1_D( testnum, inst, flags, result, val1 ) \
462 TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, 0.0, 0.0, \
463 inst f3, f0; fmv.x.d a0, f3)
464
465 #define TEST_FP_OP1_S_DWORD_RESULT( testnum, inst, flags, result, val1 ) \
466 TEST_FP_OP_S_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \
467 inst f3, f0; fmv.x.s a0, f3)
468
469 #define TEST_FP_OP1_D_DWORD_RESULT( testnum, inst, flags, result, val1 ) \
470 TEST_FP_OP_D_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \
471 inst f3, f0; fmv.x.d a0, f3)
472
473 #define TEST_FP_OP2_S( testnum, inst, flags, result, val1, val2 ) \
474 TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, 0.0, \
475 inst f3, f0, f1; fmv.x.s a0, f3)
476
477 #define TEST_FP_OP2_D( testnum, inst, flags, result, val1, val2 ) \
478 TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, val2, 0.0, \
479 inst f3, f0, f1; fmv.x.d a0, f3)
480
481 #define TEST_FP_OP3_S( testnum, inst, flags, result, val1, val2, val3 ) \
482 TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, val3, \
483 inst f3, f0, f1, f2; fmv.x.s a0, f3)
484
485 #define TEST_FP_OP3_D( testnum, inst, flags, result, val1, val2, val3 ) \
486 TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, val2, val3, \
487 inst f3, f0, f1, f2; fmv.x.d a0, f3)
488
489 #define TEST_FP_INT_OP_S( testnum, inst, flags, result, val1, rm ) \
490 TEST_FP_OP_S_INTERNAL( testnum, flags, word result, val1, 0.0, 0.0, \
491 inst a0, f0, rm)
492
493 #define TEST_FP_INT_OP_D( testnum, inst, flags, result, val1, rm ) \
494 TEST_FP_OP_D_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \
495 inst a0, f0, rm)
496
497 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
498 TEST_FP_OP_S_INTERNAL( testnum, 0, word result, val1, val2, 0.0, \
499 inst a0, f0, f1)
500
501 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
502 TEST_FP_OP_D_INTERNAL( testnum, 0, dword result, val1, val2, 0.0, \
503 inst a0, f0, f1)
504
505 #define TEST_FCLASS_S(testnum, correct, input) \
506 TEST_CASE(testnum, a0, correct, li a0, input; fmv.s.x fa0, a0; \
507 fclass.s a0, fa0)
508
509 #define TEST_FCLASS_D(testnum, correct, input) \
510 TEST_CASE(testnum, a0, correct, li a0, input; fmv.d.x fa0, a0; \
511 fclass.d a0, fa0)
512
513 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
514 test_ ## testnum: \
515 li TESTNUM, testnum; \
516 la a0, test_ ## testnum ## _data ;\
517 lw a3, 0(a0); \
518 li a0, val1; \
519 inst f0, a0; \
520 fsflags x0; \
521 fmv.x.s a0, f0; \
522 bne a0, a3, fail; \
523 .pushsection .data; \
524 .align 2; \
525 test_ ## testnum ## _data: \
526 .float result; \
527 .popsection
528
529 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
530 test_ ## testnum: \
531 li TESTNUM, testnum; \
532 la a0, test_ ## testnum ## _data ;\
533 ld a3, 0(a0); \
534 li a0, val1; \
535 inst f0, a0; \
536 fsflags x0; \
537 fmv.x.d a0, f0; \
538 bne a0, a3, fail; \
539 .pushsection .data; \
540 .align 3; \
541 test_ ## testnum ## _data: \
542 .double result; \
543 .popsection
544
545 #-----------------------------------------------------------------------
546 # Pass and fail code (assumes test num is in TESTNUM)
547 #-----------------------------------------------------------------------
548
549 #define TEST_PASSFAIL \
550 bne x0, TESTNUM, pass; \
551 fail: \
552 RVTEST_FAIL; \
553 pass: \
554 RVTEST_PASS \
555
556
557 #-----------------------------------------------------------------------
558 # Test data section
559 #-----------------------------------------------------------------------
560
561 #define TEST_DATA
562
563 #endif