1 #ifndef __TEST_MACROS_VECTOR_H
2 #define __TEST_MACROS_VECTOR_H
5 #-----------------------------------------------------------------------
7 #-----------------------------------------------------------------------
9 #define TEST_CASE( testnum, testreg, correctval, code... ) \
10 TEST_CASE_NREG( testnum, 32, 32, testreg, correctval, code )
12 # We use j fail, because for some cases branches are not enough to jump to fail
14 #define TEST_CASE_NREG( testnum, nxreg, nfreg, testreg, correctval, code... ) \
17 vvcfgivl a3,a3,nxreg,nfreg; \
18 lui a0,%hi(vtcode ## testnum ); \
19 vf %lo(vtcode ## testnum )(a0); \
21 vsd v ## testreg, a4; \
26 test_loop ## testnum: \
28 beq a0,a1,skip ## testnum; \
33 bne a2,a3,test_loop ## testnum; \
40 # We use a macro hack to simpify code generation for various numbers
43 #define TEST_INSERT_NOPS_0
44 #define TEST_INSERT_NOPS_1 nop; TEST_INSERT_NOPS_0
45 #define TEST_INSERT_NOPS_2 nop; TEST_INSERT_NOPS_1
46 #define TEST_INSERT_NOPS_3 nop; TEST_INSERT_NOPS_2
47 #define TEST_INSERT_NOPS_4 nop; TEST_INSERT_NOPS_3
48 #define TEST_INSERT_NOPS_5 nop; TEST_INSERT_NOPS_4
49 #define TEST_INSERT_NOPS_6 nop; TEST_INSERT_NOPS_5
50 #define TEST_INSERT_NOPS_7 nop; TEST_INSERT_NOPS_6
51 #define TEST_INSERT_NOPS_8 nop; TEST_INSERT_NOPS_7
52 #define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
53 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
56 #-----------------------------------------------------------------------
58 #-----------------------------------------------------------------------
60 #-----------------------------------------------------------------------
61 # Tests for instructions with immediate operand
62 #-----------------------------------------------------------------------
64 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
65 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
70 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
71 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
76 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
77 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
80 TEST_INSERT_NOPS_ ## nop_cycles \
84 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
85 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
87 TEST_INSERT_NOPS_ ## nop_cycles \
91 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
92 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
96 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
97 TEST_CASE_NREG( testnum, 2, 0, x0, 0, \
102 #-----------------------------------------------------------------------
103 # Tests for an instruction with register operands
104 #-----------------------------------------------------------------------
106 #define TEST_R_OP( testnum, inst, result, val1 ) \
107 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
112 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
113 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
118 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
119 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
122 TEST_INSERT_NOPS_ ## nop_cycles \
126 #-----------------------------------------------------------------------
127 # Tests for an instruction with register-register operands
128 #-----------------------------------------------------------------------
130 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
131 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
137 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
138 TEST_CASE_NREG( testnum, 3, 0, x1, result, \
144 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
145 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
151 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
152 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
157 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
158 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
162 TEST_INSERT_NOPS_ ## nop_cycles \
166 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
167 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
169 TEST_INSERT_NOPS_ ## src1_nops \
171 TEST_INSERT_NOPS_ ## src2_nops \
175 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
176 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
178 TEST_INSERT_NOPS_ ## src1_nops \
180 TEST_INSERT_NOPS_ ## src2_nops \
184 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
185 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
190 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
191 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
196 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
197 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
201 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
202 TEST_CASE_NREG( testnum, 3, 0, x0, 0, \
209 #-----------------------------------------------------------------------
211 #-----------------------------------------------------------------------
213 #-----------------------------------------------------------------------
214 # Tests floating-point instructions
215 #-----------------------------------------------------------------------
217 #define TEST_FP_OP_S_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \
220 vvcfgivl a3,a3,nxreg,nfreg; \
221 la a5, test_ ## testnum ## _data ;\
222 vflstw vf0, a5, x0; \
224 vflstw vf1, a5, x0; \
226 vflstw vf2, a5, x0; \
228 lui a0,%hi(vtcode ## testnum ); \
229 vf %lo(vtcode ## testnum )(a0); \
236 test_loop ## testnum: \
238 beq a0,a1,skip ## testnum; \
243 bne a2,a3,test_loop ## testnum; \
245 vtcode ## testnum : \
249 test_ ## testnum ## _data: \
256 #define TEST_FP_OP_D_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \
259 vvcfgivl a3,a3,nxreg,nfreg; \
260 la a5, test_ ## testnum ## _data ;\
261 vflstd vf0, a5, x0; \
263 vflstd vf1, a5, x0; \
265 vflstd vf2, a5, x0; \
267 lui a0,%hi(vtcode ## testnum ); \
268 vf %lo(vtcode ## testnum )(a0); \
275 test_loop ## testnum: \
277 beq a0,a1,skip ## testnum; \
282 bne a2,a3,test_loop ## testnum; \
284 vtcode ## testnum : \
288 test_ ## testnum ## _data: \
295 #define TEST_FCVT_S_D( testnum, result, val1 ) \
296 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, 0.0, 0.0, \
297 fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d x1, f3)
299 #define TEST_FCVT_D_S( testnum, result, val1 ) \
300 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, 0.0, 0.0, \
301 fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s x1, f3)
303 #define TEST_FP_OP2_S( testnum, inst, result, val1, val2 ) \
304 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, 0.0, \
305 inst f3, f0, f1; fmv.x.s x1, f3)
307 #define TEST_FP_OP2_D( testnum, inst, result, val1, val2 ) \
308 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, 0.0, \
309 inst f3, f0, f1; fmv.x.d x1, f3)
311 #define TEST_FP_OP3_S( testnum, inst, result, val1, val2, val3 ) \
312 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, val3, \
313 inst f3, f0, f1, f2; fmv.x.s x1, f3)
315 #define TEST_FP_OP3_D( testnum, inst, result, val1, val2, val3 ) \
316 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, val3, \
317 inst f3, f0, f1, f2; fmv.x.d x1, f3)
319 #define TEST_FP_INT_OP_S( testnum, inst, result, val1, rm ) \
320 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, 0.0, 0.0, \
323 #define TEST_FP_INT_OP_D( testnum, inst, result, val1, rm ) \
324 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, 0.0, 0.0, \
327 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
328 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, val2, 0.0, \
331 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
332 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, val2, 0.0, \
335 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
338 vvcfgivl a3,a3,2,1; \
339 lui a0,%hi(vtcode ## testnum ); \
340 vf %lo(vtcode ## testnum )(a0); \
344 la a5, test_ ## testnum ## _data ;\
348 test_loop ## testnum: \
350 beq a0,a1,skip ## testnum; \
355 bne a2,a3,test_loop ## testnum; \
357 vtcode ## testnum : \
363 test_ ## testnum ## _data: \
367 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
370 vvcfgivl a3,a3,2,1; \
371 lui a0,%hi(vtcode ## testnum ); \
372 vf %lo(vtcode ## testnum )(a0); \
376 la a5, test_ ## testnum ## _data ;\
380 test_loop ## testnum: \
382 beq a0,a1,skip ## testnum; \
387 bne a2,a3,test_loop ## testnum; \
389 vtcode ## testnum : \
395 test_ ## testnum ## _data: \
400 #-----------------------------------------------------------------------
402 #-----------------------------------------------------------------------
404 #-----------------------------------------------------------------------
405 # Test branch instructions
406 #-----------------------------------------------------------------------
408 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2) \
409 TEST_CASE_NREG( testnum, 4, 0, x3, 0, \
417 2: inst x1, x2, 1b; \
422 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
423 TEST_CASE_NREG( testnum, 4, 0, x3, 0, \
431 2: inst x1, x2, 1b; \
435 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
436 TEST_CASE_NREG( testnum, 6, 0, x3, 0, \
440 TEST_INSERT_NOPS_ ## src1_nops \
442 TEST_INSERT_NOPS_ ## src2_nops \
452 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
453 TEST_CASE_NREG( testnum, 6, 0, x3, 0, \
457 TEST_INSERT_NOPS_ ## src1_nops \
459 TEST_INSERT_NOPS_ ## src2_nops \
469 #define TEST_BR2_DIVERGED_ODD_EVEN( testnum, inst, n, result, code...) \
470 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
486 #define TEST_BR2_DIVERGED_FULL12( testnum, inst, n, result, code... ) \
487 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
501 #define TEST_BR2_DIVERGED_FULL21( testnum, inst, n, result, code... ) \
502 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
516 #define TEST_CASE_NREG_MEM( testnum, nxreg, nfreg, correctval, code... ) \
519 vvcfgivl a3,a3,nxreg,nfreg; \
520 lui a0,%hi(vtcode ## testnum ); \
521 vf %lo(vtcode ## testnum )(a0); \
527 test_loop ## testnum: \
529 beq a0,a1,skip ## testnum; \
534 bne a2,a3,test_loop ## testnum; \
536 vtcode ## testnum : \
541 #define TEST_BR2_DIVERGED_MEM_FULL12( testnum, inst, n) \
542 TEST_CASE_NREG_MEM( testnum, 7, 0, 1, \
562 #define TEST_BR2_DIVERGED_MEM_FULL21( testnum, inst, n) \
563 TEST_CASE_NREG_MEM( testnum, 7, 0, 1, \
583 #-----------------------------------------------------------------------
584 # Pass and fail code (assumes test num is in x28)
585 #-----------------------------------------------------------------------
587 #define TEST_PASSFAIL \
595 #-----------------------------------------------------------------------
597 #-----------------------------------------------------------------------