isa/macros/vector/test_macros.h

   1 #ifndef __TEST_MACROS_VECTOR_H
   2 #define __TEST_MACROS_VECTOR_H
   3
   4 #define TEST_DATA \
   5         .data; \
   6         .align 3; \
   7 dst: \
   8         .skip 16384; \
   9
  10 #-----------------------------------------------------------------------
  11 # Helper macros
  12 #-----------------------------------------------------------------------
  13
  14 #define TEST_CASE( testnum, testreg, correctval, code... ) \
  15   TEST_CASE_NREG( testnum, 32, 32, testreg, correctval, code )
  16
  17 # We use j fail, because for some cases branches are not enough to jump to fail
  18
  19 #define TEST_CASE_NREG( testnum, nxreg, nfreg, testreg, correctval, code... ) \
  20 test_ ## testnum: \
  21   li a3,2048; \
  22   vvcfgivl a3,a3,nxreg,nfreg; \
  23   lui a0,%hi(vtcode ## testnum ); \
  24   vf %lo(vtcode ## testnum )(a0); \
  25   la a4,dst; \
  26   vsd v ## testreg, a4; \
  27   fence.v.l; \
  28   li a1,correctval; \
  29   li a2,0; \
  30   li x28, testnum; \
  31 test_loop ## testnum: \
  32   ld a0,0(a4); \
  33   beq a0,a1,skip ## testnum; \
  34   j fail; \
  35 skip ## testnum : \
  36   addi a4,a4,8; \
  37   addi a2,a2,1; \
  38   bne a2,a3,test_loop ## testnum; \
  39   j next ## testnum; \
  40 vtcode ## testnum : \
  41   code; \
  42   stop; \
  43 next ## testnum :
  44
  45 # We use a macro hack to simpify code generation for various numbers
  46 # of bubble cycles.
  47
  48 #define TEST_INSERT_NOPS_0
  49 #define TEST_INSERT_NOPS_1  nop; TEST_INSERT_NOPS_0
  50 #define TEST_INSERT_NOPS_2  nop; TEST_INSERT_NOPS_1
  51 #define TEST_INSERT_NOPS_3  nop; TEST_INSERT_NOPS_2
  52 #define TEST_INSERT_NOPS_4  nop; TEST_INSERT_NOPS_3
  53 #define TEST_INSERT_NOPS_5  nop; TEST_INSERT_NOPS_4
  54 #define TEST_INSERT_NOPS_6  nop; TEST_INSERT_NOPS_5
  55 #define TEST_INSERT_NOPS_7  nop; TEST_INSERT_NOPS_6
  56 #define TEST_INSERT_NOPS_8  nop; TEST_INSERT_NOPS_7
  57 #define TEST_INSERT_NOPS_9  nop; TEST_INSERT_NOPS_8
  58 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
  59
  60 #-----------------------------------------------------------------------
  61 # Tests for instructions with immediate operand
  62 #-----------------------------------------------------------------------
  63
  64 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
  65     TEST_CASE_NREG( testnum, 4, 0, x3, result, \
  66       li  x1, val1; \
  67       inst x3, x1, imm; \
  68     )
  69
  70 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
  71     TEST_CASE_NREG( testnum, 2, 0, x1, result, \
  72       li  x1, val1; \
  73       inst x1, x1, imm; \
  74     )
  75
  76 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
  77     TEST_CASE_NREG( testnum, 5, 0, x4, result, \
  78       li  x1, val1; \
  79       inst x3, x1, imm; \
  80       TEST_INSERT_NOPS_ ## nop_cycles \
  81       addi  x4, x3, 0; \
  82     )
  83
  84 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
  85     TEST_CASE_NREG( testnum, 4, 0, x3, result, \
  86       li  x1, val1; \
  87       TEST_INSERT_NOPS_ ## nop_cycles \
  88       inst x3, x1, imm; \
  89     )
  90
  91 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
  92     TEST_CASE_NREG( testnum, 2, 0, x1, result, \
  93       inst x1, x0, imm; \
  94     )
  95
  96 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
  97     TEST_CASE_NREG( testnum, 2, 0, x0, 0, \
  98       li  x1, val1; \
  99       inst x0, x1, imm; \
 100     )
 101
 102 #-----------------------------------------------------------------------
 103 # Tests for an instruction with register operands
 104 #-----------------------------------------------------------------------
 105
 106 #define TEST_R_OP( testnum, inst, result, val1 ) \
 107     TEST_CASE_NREG( testnum, 4, 0, x3, result, \
 108       li  x1, val1; \
 109       inst x3, x1; \
 110     )
 111
 112 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
 113     TEST_CASE_NREG( testnum, 2, 0, x1, result, \
 114       li  x1, val1; \
 115       inst x1, x1; \
 116     )
 117
 118 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
 119     TEST_CASE_NREG( testnum, 5, 0, x4, result, \
 120       li  x1, val1; \
 121       inst x3, x1; \
 122       TEST_INSERT_NOPS_ ## nop_cycles \
 123       addi  x4, x3, 0; \
 124     )
 125
 126 #-----------------------------------------------------------------------
 127 # Tests for an instruction with register-register operands
 128 #-----------------------------------------------------------------------
 129
 130 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
 131     TEST_CASE_NREG( testnum, 4, 0, x3, result, \
 132       li  x1, val1; \
 133       li  x2, val2; \
 134       inst x3, x1, x2; \
 135     )
 136
 137 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
 138     TEST_CASE_NREG( testnum, 3, 0, x1, result, \
 139       li  x1, val1; \
 140       li  x2, val2; \
 141       inst x1, x1, x2; \
 142     )
 143
 144 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
 145     TEST_CASE_NREG( testnum, 3, 0, x2, result, \
 146       li  x1, val1; \
 147       li  x2, val2; \
 148       inst x2, x1, x2; \
 149     )
 150
 151 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
 152     TEST_CASE_NREG( testnum, 2, 0, x1, result, \
 153       li  x1, val1; \
 154       inst x1, x1, x1; \
 155     )
 156
 157 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
 158     TEST_CASE_NREG( testnum, 5, 0, x4, result, \
 159       li  x1, val1; \
 160       li  x2, val2; \
 161       inst x3, x1, x2; \
 162       TEST_INSERT_NOPS_ ## nop_cycles \
 163       addi  x4, x3, 0; \
 164     )
 165
 166 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
 167     TEST_CASE_NREG( testnum, 4, 0, x3, result, \
 168       li  x1, val1; \
 169       TEST_INSERT_NOPS_ ## src1_nops \
 170       li  x2, val2; \
 171       TEST_INSERT_NOPS_ ## src2_nops \
 172       inst x3, x1, x2; \
 173     )
 174
 175 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
 176     TEST_CASE_NREG( testnum, 4, 0, x3, result, \
 177       li  x2, val2; \
 178       TEST_INSERT_NOPS_ ## src1_nops \
 179       li  x1, val1; \
 180       TEST_INSERT_NOPS_ ## src2_nops \
 181       inst x3, x1, x2; \
 182     )
 183
 184 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
 185     TEST_CASE_NREG( testnum, 3, 0, x2, result, \
 186       li x1, val; \
 187       inst x2, x0, x1; \
 188     )
 189
 190 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
 191     TEST_CASE_NREG( testnum, 3, 0, x2, result, \
 192       li x1, val; \
 193       inst x2, x1, x0; \
 194     )
 195
 196 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
 197     TEST_CASE_NREG( testnum, 2, 0, x1, result, \
 198       inst x1, x0, x0; \
 199     )
 200
 201 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
 202     TEST_CASE_NREG( testnum, 3, 0, x0, 0, \
 203       li x1, val1; \
 204       li x2, val2; \
 205       inst x0, x1, x2; \
 206     )
 207
 208 #-----------------------------------------------------------------------
 209 # Test branch instructions
 210 #-----------------------------------------------------------------------
 211
 212 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2) \
 213     TEST_CASE_NREG( testnum, 4, 0, x3, 0, \
 214       li x1, val1; \
 215       li x2, val2; \
 216       add x3, x0, x0; \
 217       inst x1, x2, 2f; \
 218       addi x3, x3, 1; \
 219 1:    j 3f; \
 220       addi x3, x3, 4; \
 221 2:    inst x1, x2, 1b; \
 222       addi x3, x3, 2; \
 223 3: \
 224     )
 225
 226 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
 227   TEST_CASE_NREG( testnum, 4, 0, x3, 0, \
 228     li  x1, val1; \
 229     li  x2, val2; \
 230     add x3, x0, x0; \
 231     inst x1, x2, 1f; \
 232     j 2f; \
 233 1:  addi x3, x3, 1; \
 234     j 3f; \
 235 2:  inst x1, x2, 1b; \
 236 3: \
 237                   )
 238
 239 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
 240   TEST_CASE_NREG( testnum, 6, 0, x3, 0, \
 241     add x3, x0, x0; \
 242     li  x4, 0; \
 243 1:  li  x1, val1; \
 244     TEST_INSERT_NOPS_ ## src1_nops \
 245     li  x2, val2; \
 246     TEST_INSERT_NOPS_ ## src2_nops \
 247     inst x1, x2, 2f; \
 248     addi  x4, x4, 1; \
 249     li  x5, 2; \
 250     bne x4, x5, 1b; \
 251     j 3f; \
 252 2:  add x3, x3, 1; \
 253 3:  \
 254   )
 255
 256 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
 257   TEST_CASE_NREG( testnum, 6, 0, x3, 0, \
 258     add x3, x0, x0; \
 259     li  x4, 0; \
 260 1:  li  x2, val2; \
 261     TEST_INSERT_NOPS_ ## src1_nops \
 262     li  x1, val1; \
 263     TEST_INSERT_NOPS_ ## src2_nops \
 264     inst x1, x2, 2f; \
 265     addi  x4, x4, 1; \
 266     li  x5, 2; \
 267     bne x4, x4, 1b; \
 268     j 3f; \
 269 2:  add x3, x3, 1; \
 270 3: \
 271                   )
 272
 273 #define TEST_BR2_DIVERGED_ODD_EVEN( testnum, inst, n, result, code...)   \
 274   TEST_CASE_NREG( testnum, 5, 0, x3, result, \
 275     utidx x1; \
 276     andi x2, x1, 1;\
 277     add x3, x0, x0; \
 278     li x4, n; \
 279 1: \
 280     beq x0, x2, 2f; \
 281     code; \
 282     j 3f; \
 283 2: \
 284     code; \
 285 3: \
 286     addi x4, x4, -1; \
 287     bne x4, x0, 1b; \
 288                   )
 289
 290 #define TEST_BR2_DIVERGED_FULL12( testnum, inst, n, result, code... )    \
 291   TEST_CASE_NREG( testnum, 5, 0, x3, result, \
 292     utidx x1; \
 293     sltiu x2, x1, 1; \
 294     add x3, x0, x0; \
 295     li x4, n; \
 296 1: \
 297     inst x2, x4, 2f; \
 298     addi x1, x1, -1; \
 299     sltiu x2, x1, 1; \
 300     j 1b; \
 301 2: \
 302     code; \
 303                  )
 304
 305 #define TEST_BR2_DIVERGED_FULL21( testnum, inst, n, result, code... )    \
 306   TEST_CASE_NREG( testnum, 5, 0, x3, result, \
 307     utidx x1; \
 308     sltiu x2, x1, 1; \
 309     add x3, x0, x0; \
 310     li x4, n; \
 311 1: \
 312     inst x4, x2, 2f; \
 313     addi x1, x1, -1; \
 314     sltiu x2, x1, 1; \
 315     j 1b; \
 316 2: \
 317     code; \
 318                  )
 319
 320 #define TEST_CASE_NREG_MEM( testnum, nxreg, nfreg, correctval, code... ) \
 321 test_ ## testnum: \
 322   li a3,2048; \
 323   vvcfgivl a3,a3,nxreg,nfreg; \
 324   lui a0,%hi(vtcode ## testnum ); \
 325   vf %lo(vtcode ## testnum )(a0); \
 326   la a4,dst; \
 327   fence.v.l; \
 328   li a1,correctval; \
 329   li a2,0; \
 330   li x28, testnum; \
 331 test_loop ## testnum: \
 332   ld a0,0(a4); \
 333   beq a0,a1,skip ## testnum; \
 334   j fail; \
 335 skip ## testnum : \
 336   addi a4,a4,8; \
 337   addi a2,a2,1; \
 338   bne a2,a3,test_loop ## testnum; \
 339   j next ## testnum; \
 340 vtcode ## testnum : \
 341   code; \
 342   stop; \
 343 next ## testnum :
 344
 345 #define TEST_BR2_DIVERGED_MEM_FULL12( testnum, inst, n) \
 346   TEST_CASE_NREG_MEM( testnum, 7, 0, 1, \
 347     utidx x5; \
 348     slli x5, x5, 3; \
 349     la x6, dst; \
 350     add x5, x5, x6; \
 351     sd x0, 0(x5); \
 352     utidx x1; \
 353     sltiu x2, x1, 1; \
 354     li x4, n; \
 355 1: \
 356     inst x2, x4, 2f; \
 357     addi x1, x1, -1; \
 358     sltiu x2, x1, 1; \
 359     j 1b; \
 360 2: \
 361     ld x3, 0(x5); \
 362     addi x3, x3, 1; \
 363     sd x3, 0(x5); \
 364                  )
 365
 366 #define TEST_BR2_DIVERGED_MEM_FULL21( testnum, inst, n) \
 367   TEST_CASE_NREG_MEM( testnum, 7, 0, 1, \
 368     utidx x5; \
 369     slli x5, x5, 3; \
 370     la x6, dst; \
 371     add x5, x5, x6; \
 372     sd x0, 0(x5); \
 373     utidx x1; \
 374     sltiu x2, x1, 1; \
 375     li x4, n; \
 376 1: \
 377     inst x4, x2, 2f; \
 378     addi x1, x1, -1; \
 379     sltiu x2, x1, 1; \
 380     j 1b; \
 381 2: \
 382     ld x3, 0(x5); \
 383     addi x3, x3, 1; \
 384     sd x3, 0(x5); \
 385                  )
 386
 387 #-----------------------------------------------------------------------
 388 # Tests floating-point instructions
 389 #-----------------------------------------------------------------------
 390
 391 #define TEST_FP_OP_S_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \
 392 test_ ## testnum: \
 393   li a3,2048; \
 394   vvcfgivl a3,a3,nxreg,nfreg; \
 395   la  a5, test_ ## testnum ## _data ;\
 396   vflstw vf0, a5, x0; \
 397   addi a5,a5,4; \
 398   vflstw vf1, a5, x0; \
 399   addi a5,a5,4; \
 400   vflstw vf2, a5, x0; \
 401   addi a5,a5,4; \
 402   lui a0,%hi(vtcode ## testnum ); \
 403   vf %lo(vtcode ## testnum )(a0); \
 404   la a4,dst; \
 405   vsw vx1, a4; \
 406   fence.v.l; \
 407   lw  a1, 0(a5); \
 408   li a2, 0; \
 409   li x28, testnum; \
 410 test_loop ## testnum: \
 411   lw a0,0(a4); \
 412   beq a0,a1,skip ## testnum; \
 413   j fail; \
 414 skip ## testnum : \
 415   addi a4,a4,4; \
 416   addi a2,a2,1; \
 417   bne a2,a3,test_loop ## testnum; \
 418   b 1f; \
 419 vtcode ## testnum : \
 420   code; \
 421   stop; \
 422   .align 2; \
 423   test_ ## testnum ## _data: \
 424   .float val1; \
 425   .float val2; \
 426   .float val3; \
 427   .result; \
 428 1:
 429
 430 #define TEST_FP_OP_D_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \
 431 test_ ## testnum: \
 432   li a3,2048; \
 433   vvcfgivl a3,a3,nxreg,nfreg; \
 434   la  a5, test_ ## testnum ## _data ;\
 435   vflstd vf0, a5, x0; \
 436   addi a5,a5,8; \
 437   vflstd vf1, a5, x0; \
 438   addi a5,a5,8; \
 439   vflstd vf2, a5, x0; \
 440   addi a5,a5,8; \
 441   lui a0,%hi(vtcode ## testnum ); \
 442   vf %lo(vtcode ## testnum )(a0); \
 443   la a4,dst; \
 444   vsd vx1, a4; \
 445   fence.v.l; \
 446   ld  a1, 0(a5); \
 447   li a2, 0; \
 448   li x28, testnum; \
 449 test_loop ## testnum: \
 450   ld a0,0(a4); \
 451   beq a0,a1,skip ## testnum; \
 452   j fail; \
 453 skip ## testnum : \
 454   addi a4,a4,8; \
 455   addi a2,a2,1; \
 456   bne a2,a3,test_loop ## testnum; \
 457   b 1f; \
 458 vtcode ## testnum : \
 459   code; \
 460   stop; \
 461   .align 3; \
 462   test_ ## testnum ## _data: \
 463   .double val1; \
 464   .double val2; \
 465   .double val3; \
 466   .result; \
 467 1:
 468
 469 #define TEST_FCVT_S_D( testnum, result, val1 ) \
 470   TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, 0.0, 0.0, \
 471                     fcvt.s.d f3, f0; fcvt.d.s f3, f3; mftx.d x1, f3)
 472
 473 #define TEST_FCVT_D_S( testnum, result, val1 ) \
 474   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, 0.0, 0.0, \
 475                     fcvt.d.s f3, f0; fcvt.s.d f3, f3; mftx.s x1, f3)
 476
 477 #define TEST_FP_OP2_S( testnum, inst, result, val1, val2 ) \
 478   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, 0.0, \
 479                     inst f3, f0, f1; mftx.s x1, f3)
 480
 481 #define TEST_FP_OP2_D( testnum, inst, result, val1, val2 ) \
 482   TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, 0.0, \
 483                     inst f3, f0, f1; mftx.d x1, f3)
 484
 485 #define TEST_FP_OP3_S( testnum, inst, result, val1, val2, val3 ) \
 486   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, val3, \
 487                     inst f3, f0, f1, f2; mftx.s x1, f3)
 488
 489 #define TEST_FP_OP3_D( testnum, inst, result, val1, val2, val3 ) \
 490   TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, val3, \
 491                     inst f3, f0, f1, f2; mftx.d x1, f3)
 492
 493 #define TEST_FP_INT_OP_S( testnum, inst, result, val1, rm ) \
 494   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, 0.0, 0.0, \
 495                     inst x1, f0, rm)
 496
 497 #define TEST_FP_INT_OP_D( testnum, inst, result, val1, rm ) \
 498   TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, 0.0, 0.0, \
 499                     inst x1, f0, rm)
 500
 501 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
 502   TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, val2, 0.0, \
 503                     inst x1, f0, f1)
 504
 505 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
 506   TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, val2, 0.0, \
 507                     inst x1, f0, f1)
 508
 509 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
 510 test_ ## testnum: \
 511   li a3,2048; \
 512   vvcfgivl a3,a3,2,1; \
 513   lui a0,%hi(vtcode ## testnum ); \
 514   vf %lo(vtcode ## testnum )(a0); \
 515   la a4,dst; \
 516   vsw vx1, a4; \
 517   fence.v.l; \
 518   la  a5, test_ ## testnum ## _data ;\
 519   lw  a1, 0(a5); \
 520   li a2, 0; \
 521   li x28, testnum; \
 522 test_loop ## testnum: \
 523   lw a0,0(a4); \
 524   beq a0,a1,skip ## testnum; \
 525   j fail; \
 526 skip ## testnum : \
 527   addi a4,a4,4; \
 528   addi a2,a2,1; \
 529   bne a2,a3,test_loop ## testnum; \
 530   b 1f; \
 531 vtcode ## testnum : \
 532   li x1, val1; \
 533   inst f0, x1; \
 534   mftx.s x1, f0; \
 535   stop; \
 536   .align 2; \
 537   test_ ## testnum ## _data: \
 538   .float result; \
 539 1:
 540
 541 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
 542 test_ ## testnum: \
 543   li a3,2048; \
 544   vvcfgivl a3,a3,2,1; \
 545   lui a0,%hi(vtcode ## testnum ); \
 546   vf %lo(vtcode ## testnum )(a0); \
 547   la a4,dst; \
 548   vsd vx1, a4; \
 549   fence.v.l; \
 550   la  a5, test_ ## testnum ## _data ;\
 551   ld  a1, 0(a5); \
 552   li a2, 0; \
 553   li x28, testnum; \
 554 test_loop ## testnum: \
 555   ld a0,0(a4); \
 556   beq a0,a1,skip ## testnum; \
 557   j fail; \
 558 skip ## testnum : \
 559   addi a4,a4,8; \
 560   addi a2,a2,1; \
 561   bne a2,a3,test_loop ## testnum; \
 562   b 1f; \
 563 vtcode ## testnum : \
 564   li x1, val1; \
 565   inst f0, x1; \
 566   mftx.d x1, f0; \
 567   stop; \
 568   .align 3; \
 569   test_ ## testnum ## _data: \
 570   .double result; \
 571 1:
 572
 573 #-----------------------------------------------------------------------
 574 # Pass and fail code (assumes test num is in x28)
 575 #-----------------------------------------------------------------------
 576
 577 #define TEST_PASSFAIL \
 578         bne x0, x28, pass; \
 579 fail: \
 580         RVTEST_FAIL \
 581 pass: \
 582         RVTEST_PASS \
 583
 584 #endif