1 #ifndef __TEST_MACROS_VECTOR_H
2 #define __TEST_MACROS_VECTOR_H
5 #-----------------------------------------------------------------------
7 #-----------------------------------------------------------------------
9 #define TEST_CASE( testnum, testreg, correctval, code... ) \
10 TEST_CASE_NREG( testnum, 32, 32, testreg, correctval, code )
12 # We use j fail, because for some cases branches are not enough to jump to fail
14 #define TEST_CASE_NREG( testnum, nxreg, nfreg, testreg, correctval, code... ) \
16 vsetcfg nxreg,nfreg; \
19 lui a0,%hi(vtcode ## testnum ); \
20 vf %lo(vtcode ## testnum )(a0); \
22 vsd v ## testreg, a4; \
27 test_loop ## testnum: \
29 beq a0,a1,skip ## testnum; \
34 bne a2,a3,test_loop ## testnum; \
41 # We use a macro hack to simpify code generation for various numbers
44 #define TEST_INSERT_NOPS_0
45 #define TEST_INSERT_NOPS_1 nop; TEST_INSERT_NOPS_0
46 #define TEST_INSERT_NOPS_2 nop; TEST_INSERT_NOPS_1
47 #define TEST_INSERT_NOPS_3 nop; TEST_INSERT_NOPS_2
48 #define TEST_INSERT_NOPS_4 nop; TEST_INSERT_NOPS_3
49 #define TEST_INSERT_NOPS_5 nop; TEST_INSERT_NOPS_4
50 #define TEST_INSERT_NOPS_6 nop; TEST_INSERT_NOPS_5
51 #define TEST_INSERT_NOPS_7 nop; TEST_INSERT_NOPS_6
52 #define TEST_INSERT_NOPS_8 nop; TEST_INSERT_NOPS_7
53 #define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
54 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
57 #-----------------------------------------------------------------------
59 #-----------------------------------------------------------------------
61 #-----------------------------------------------------------------------
62 # Tests for instructions with immediate operand
63 #-----------------------------------------------------------------------
65 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
66 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
71 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
72 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
77 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
78 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
81 TEST_INSERT_NOPS_ ## nop_cycles \
85 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
86 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
88 TEST_INSERT_NOPS_ ## nop_cycles \
92 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
93 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
97 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
98 TEST_CASE_NREG( testnum, 2, 0, x0, 0, \
103 #-----------------------------------------------------------------------
104 # Tests for an instruction with register operands
105 #-----------------------------------------------------------------------
107 #define TEST_R_OP( testnum, inst, result, val1 ) \
108 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
113 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
114 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
119 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
120 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
123 TEST_INSERT_NOPS_ ## nop_cycles \
127 #-----------------------------------------------------------------------
128 # Tests for an instruction with register-register operands
129 #-----------------------------------------------------------------------
131 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
132 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
138 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
139 TEST_CASE_NREG( testnum, 3, 0, x1, result, \
145 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
146 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
152 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
153 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
158 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
159 TEST_CASE_NREG( testnum, 5, 0, x4, result, \
163 TEST_INSERT_NOPS_ ## nop_cycles \
167 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
168 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
170 TEST_INSERT_NOPS_ ## src1_nops \
172 TEST_INSERT_NOPS_ ## src2_nops \
176 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
177 TEST_CASE_NREG( testnum, 4, 0, x3, result, \
179 TEST_INSERT_NOPS_ ## src1_nops \
181 TEST_INSERT_NOPS_ ## src2_nops \
185 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
186 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
191 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
192 TEST_CASE_NREG( testnum, 3, 0, x2, result, \
197 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
198 TEST_CASE_NREG( testnum, 2, 0, x1, result, \
202 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
203 TEST_CASE_NREG( testnum, 3, 0, x0, 0, \
210 #-----------------------------------------------------------------------
212 #-----------------------------------------------------------------------
214 #-----------------------------------------------------------------------
215 # Tests floating-point instructions
216 #-----------------------------------------------------------------------
218 #define TEST_FP_OP_S_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \
220 vsetcfg nxreg,nfreg; \
223 la a5, test_ ## testnum ## _data ;\
224 vflstw vf0, a5, x0; \
226 vflstw vf1, a5, x0; \
228 vflstw vf2, a5, x0; \
230 lui a0,%hi(vtcode ## testnum ); \
231 vf %lo(vtcode ## testnum )(a0); \
238 test_loop ## testnum: \
240 beq a0,a1,skip ## testnum; \
245 bne a2,a3,test_loop ## testnum; \
247 vtcode ## testnum : \
251 test_ ## testnum ## _data: \
258 #define TEST_FP_OP_D_INTERNAL_NREG( testnum, nxreg, nfreg, result, val1, val2, val3, code... ) \
260 vsetcfg nxreg,nfreg; \
263 la a5, test_ ## testnum ## _data ;\
264 vflstd vf0, a5, x0; \
266 vflstd vf1, a5, x0; \
268 vflstd vf2, a5, x0; \
270 lui a0,%hi(vtcode ## testnum ); \
271 vf %lo(vtcode ## testnum )(a0); \
278 test_loop ## testnum: \
280 beq a0,a1,skip ## testnum; \
285 bne a2,a3,test_loop ## testnum; \
287 vtcode ## testnum : \
291 test_ ## testnum ## _data: \
298 #define TEST_FCVT_S_D( testnum, result, val1 ) \
299 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, 0.0, 0.0, \
300 fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d x1, f3)
302 #define TEST_FCVT_D_S( testnum, result, val1 ) \
303 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, 0.0, 0.0, \
304 fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s x1, f3)
306 #define TEST_FP_OP2_S( testnum, inst, result, val1, val2 ) \
307 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, 0.0, \
308 inst f3, f0, f1; fmv.x.s x1, f3)
310 #define TEST_FP_OP2_D( testnum, inst, result, val1, val2 ) \
311 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, 0.0, \
312 inst f3, f0, f1; fmv.x.d x1, f3)
314 #define TEST_FP_OP3_S( testnum, inst, result, val1, val2, val3 ) \
315 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, float result, val1, val2, val3, \
316 inst f3, f0, f1, f2; fmv.x.s x1, f3)
318 #define TEST_FP_OP3_D( testnum, inst, result, val1, val2, val3 ) \
319 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, double result, val1, val2, val3, \
320 inst f3, f0, f1, f2; fmv.x.d x1, f3)
322 #define TEST_FP_INT_OP_S( testnum, inst, result, val1, rm ) \
323 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, 0.0, 0.0, \
326 #define TEST_FP_INT_OP_D( testnum, inst, result, val1, rm ) \
327 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, 0.0, 0.0, \
330 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
331 TEST_FP_OP_S_INTERNAL_NREG( testnum, 2, 4, word result, val1, val2, 0.0, \
334 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
335 TEST_FP_OP_D_INTERNAL_NREG( testnum, 2, 4, dword result, val1, val2, 0.0, \
338 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
343 lui a0,%hi(vtcode ## testnum ); \
344 vf %lo(vtcode ## testnum )(a0); \
348 la a5, test_ ## testnum ## _data ;\
352 test_loop ## testnum: \
354 beq a0,a1,skip ## testnum; \
359 bne a2,a3,test_loop ## testnum; \
361 vtcode ## testnum : \
367 test_ ## testnum ## _data: \
371 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
376 lui a0,%hi(vtcode ## testnum ); \
377 vf %lo(vtcode ## testnum )(a0); \
381 la a5, test_ ## testnum ## _data ;\
385 test_loop ## testnum: \
387 beq a0,a1,skip ## testnum; \
392 bne a2,a3,test_loop ## testnum; \
394 vtcode ## testnum : \
400 test_ ## testnum ## _data: \
405 #-----------------------------------------------------------------------
407 #-----------------------------------------------------------------------
409 #-----------------------------------------------------------------------
410 # Test branch instructions
411 #-----------------------------------------------------------------------
413 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2) \
414 TEST_CASE_NREG( testnum, 4, 0, x3, 0, \
422 2: inst x1, x2, 1b; \
427 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
428 TEST_CASE_NREG( testnum, 4, 0, x3, 0, \
436 2: inst x1, x2, 1b; \
440 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
441 TEST_CASE_NREG( testnum, 6, 0, x3, 0, \
445 TEST_INSERT_NOPS_ ## src1_nops \
447 TEST_INSERT_NOPS_ ## src2_nops \
457 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
458 TEST_CASE_NREG( testnum, 6, 0, x3, 0, \
462 TEST_INSERT_NOPS_ ## src1_nops \
464 TEST_INSERT_NOPS_ ## src2_nops \
474 #define TEST_BR2_DIVERGED_ODD_EVEN( testnum, inst, n, result, code...) \
475 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
491 #define TEST_BR2_DIVERGED_FULL12( testnum, inst, n, result, code... ) \
492 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
506 #define TEST_BR2_DIVERGED_FULL21( testnum, inst, n, result, code... ) \
507 TEST_CASE_NREG( testnum, 5, 0, x3, result, \
521 #define TEST_CASE_NREG_MEM( testnum, nxreg, nfreg, correctval, code... ) \
523 vsetcfg nxreg,nfreg; \
526 lui a0,%hi(vtcode ## testnum ); \
527 vf %lo(vtcode ## testnum )(a0); \
533 test_loop ## testnum: \
535 beq a0,a1,skip ## testnum; \
540 bne a2,a3,test_loop ## testnum; \
542 vtcode ## testnum : \
547 #define TEST_BR2_DIVERGED_MEM_FULL12( testnum, inst, n) \
548 TEST_CASE_NREG_MEM( testnum, 7, 0, 1, \
568 #define TEST_BR2_DIVERGED_MEM_FULL21( testnum, inst, n) \
569 TEST_CASE_NREG_MEM( testnum, 7, 0, 1, \
589 #-----------------------------------------------------------------------
590 # Pass and fail code (assumes test num is in x28)
591 #-----------------------------------------------------------------------
593 #define TEST_PASSFAIL \
601 #-----------------------------------------------------------------------
603 #-----------------------------------------------------------------------