Add fdiv test
[riscv-tests.git] / isa / rv32si / ipi.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # ipi.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test interprocessor interrupts.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 #undef RVTEST_RV64S
14 #define RVTEST_RV64S RVTEST_RV32S
15
16 #include "../rv64si/ipi.S"