isa/rv32si/ma_fetch.S

   1 #*****************************************************************************
   2 # ma_fetch.S
   3 #-----------------------------------------------------------------------------
   4 #
   5 # Test misaligned fetch trap.
   6 #
   7
   8 #include "riscv_test.h"
   9 #include "test_macros.h"
  10
  11 RVTEST_RV32S
  12 RVTEST_CODE_BEGIN
  13
  14   la t0, evec
  15   csrw evec, t0
  16
  17   li TESTNUM, 2
  18   la t0, evec
  19   jr t0, 2
  20   j fail
  21
  22   li TESTNUM, 3
  23   la t0, next
  24   jr t0, 1
  25   // this test should pass, since the low bit should be masked off
  26
  27 next:
  28   li TESTNUM, 4
  29   la t0, evec
  30   jr t0, 3
  31   j fail
  32
  33   j pass
  34
  35   TEST_PASSFAIL
  36
  37 evec:
  38   li t0, 3
  39   beq TESTNUM, t0, fail
  40
  41   li t1, CAUSE_MISALIGNED_FETCH
  42   csrr t0, cause
  43   bne t0, t1, fail
  44   csrr t0, epc
  45   addi t0, t0, 8
  46   csrw epc, t0
  47   sret
  48
  49 RVTEST_CODE_END
  50
  51   .data
  52 RVTEST_DATA_BEGIN
  53
  54   TEST_DATA
  55
  56 RVTEST_DATA_END