isa/rv32si/ma_fetch.S

   1 # See LICENSE for license details.
   2
   3 #*****************************************************************************
   4 # ma_fetch.S
   5 #-----------------------------------------------------------------------------
   6 #
   7 # Test misaligned fetch trap.
   8 #
   9
  10 #include "riscv_test.h"
  11 #include "test_macros.h"
  12
  13 RVTEST_RV32S
  14 RVTEST_CODE_BEGIN
  15
  16   la t0, stvec
  17   csrw stvec, t0
  18
  19   li TESTNUM, 2
  20   la t0, 1f
  21   jr t0, 2
  22 1:
  23   j fail
  24
  25   li TESTNUM, 3
  26   la t0, 2f
  27   jr t0, 1
  28 2:
  29   // this test should pass, since the low bit should be masked off
  30
  31   li TESTNUM, 4
  32   la t0, 3f
  33   jr t0, 3
  34 3:
  35   j fail
  36
  37   j pass
  38
  39   TEST_PASSFAIL
  40
  41 stvec:
  42   li t0, 3
  43   beq TESTNUM, t0, fail
  44
  45   li t1, CAUSE_MISALIGNED_FETCH
  46   csrr t0, scause
  47   bne t0, t1, fail
  48   li t1, 0
  49   csrr t0, sepc
  50   addi t0, t0, 2 // skip over instruction after jalr
  51   csrw sepc, t0
  52   sret
  53
  54 RVTEST_CODE_END
  55
  56   .data
  57 RVTEST_DATA_BEGIN
  58
  59   TEST_DATA
  60
  61 RVTEST_DATA_END