isa/rv32si/timer.S

   1 #*****************************************************************************
   2 # timer.S
   3 #-----------------------------------------------------------------------------
   4 #
   5 # Test timer interrupt.
   6 #
   7
   8 #include "riscv_test.h"
   9 #include "test_macros.h"
  10
  11 RVTEST_RV32S
  12 RVTEST_CODE_BEGIN
  13
  14   la t0, evec
  15   csrw evec, t0
  16
  17   csrr t0, count
  18   add t0, t0, 1000
  19   csrw compare, t0
  20
  21   li t1, 1<<23
  22   csrs status, t1 # turn on timer IRQ 7
  23   csrsi status, 4 # enable interrupts
  24
  25   li TESTNUM, 2
  26   li a0,10000
  27 loop:
  28   div x0, x0, x0
  29   addi a0, a0, -1
  30   bne a0, x0, loop
  31   j fail # assumption is that you can't divide in one cycle
  32
  33   TEST_PASSFAIL
  34
  35 evec:
  36   li TESTNUM, 3
  37   li t1, 0x80000000|IRQ_TIMER
  38   csrr t0, cause
  39   bne t0, t1, fail
  40   j pass
  41
  42 RVTEST_CODE_END
  43
  44   .data
  45 RVTEST_DATA_BEGIN
  46
  47   TEST_DATA
  48
  49 RVTEST_DATA_END