Test mstatus.TW, mstatus.TVM, and mstatus.TSR features
[riscv-tests.git] / isa / rv32uc / Makefrag
1 #=======================================================================
2 # Makefrag for rv32uc tests
3 #-----------------------------------------------------------------------
4
5 rv32uc_sc_tests = \
6 rvc \
7
8 rv32uc_p_tests = $(addprefix rv32uc-p-, $(rv32uc_sc_tests))
9 rv32uc_v_tests = $(addprefix rv32uc-v-, $(rv32uc_sc_tests))
10
11 spike32_tests += $(rv32uc_p_tests) $(rv32uc_v_tests)