Fixed srl, srli
[riscv-tests.git] / isa / rv32ui / Makefrag
1 #=======================================================================
2 # Makefrag for rv32ui tests
3 #-----------------------------------------------------------------------
4
5 rv32ui_sc_tests = \
6 add addi \
7 amoadd_w amoand_w amomax_w amomaxu_w amomin_w amominu_w amoor_w amoswap_w \
8 and andi \
9 auipc \
10 beq bge bgeu blt bltu bne \
11 div divu \
12 fence_i \
13 j jal jalr \
14 lb lbu lh lhu lw \
15 lui \
16 mul mulh mulhu mulhsu \
17 or ori \
18 rem remu \
19 sb sh sw \
20 sll slli \
21 slt slti \
22 sra srai \
23 srl srli \
24 #sub \
25 #xor xori \
26
27 rv32ui_mc_tests = \
28 lrsc
29
30 rv32ui_p_tests = $(addprefix rv32ui-p-, $(rv32ui_sc_tests))
31 rv32ui_pm_tests = $(addprefix rv32ui-pm-, $(rv32ui_mc_tests))
32
33 spike_tests += $(rv32ui_p_tests) $(rv32ui_pm_tests)