isa/rv32ui/andi.S

   1 #*****************************************************************************
   2 # andi.S
   3 #-----------------------------------------------------------------------------
   4 #
   5 # Test andi instruction.
   6 #
   7
   8 #include "riscv_test.h"
   9 #include "test_macros.h"
  10
  11 RVTEST_RV32U
  12 RVTEST_CODE_BEGIN
  13
  14   #-------------------------------------------------------------
  15   # Logical tests
  16   #-------------------------------------------------------------
  17
  18   TEST_IMM_OP( 2, andi, 0xff00ff00, 0xff00ff00, 0xf0f );
  19   TEST_IMM_OP( 3, andi, 0x000000f0, 0x0ff00ff0, 0x0f0 );
  20   TEST_IMM_OP( 4, andi, 0x0000000f, 0x00ff00ff, 0x70f );
  21   TEST_IMM_OP( 5, andi, 0x00000000, 0xf00ff00f, 0x0f0 );
  22
  23   #-------------------------------------------------------------
  24   # Source/Destination tests
  25   #-------------------------------------------------------------
  26
  27   TEST_IMM_SRC1_EQ_DEST( 6, andi, 0x00000000, 0xff00ff00, 0x0f0 );
  28
  29   #-------------------------------------------------------------
  30   # Bypassing tests
  31   #-------------------------------------------------------------
  32
  33   TEST_IMM_DEST_BYPASS( 7,  0, andi, 0x00000700, 0x0ff00ff0, 0x70f );
  34   TEST_IMM_DEST_BYPASS( 8,  1, andi, 0x000000f0, 0x00ff00ff, 0x0f0 );
  35   TEST_IMM_DEST_BYPASS( 9,  2, andi, 0xf00ff00f, 0xf00ff00f, 0xf0f );
  36
  37   TEST_IMM_SRC1_BYPASS( 10, 0, andi, 0x00000700, 0x0ff00ff0, 0x70f );
  38   TEST_IMM_SRC1_BYPASS( 11, 1, andi, 0x000000f0, 0x00ff00ff, 0x0f0 );
  39   TEST_IMM_SRC1_BYPASS( 12, 2, andi, 0x0000000f, 0xf00ff00f, 0x70f );
  40
  41   TEST_IMM_ZEROSRC1( 13, andi, 0, 0x0f0 );
  42   TEST_IMM_ZERODEST( 14, andi, 0x00ff00ff, 0x70f );
  43
  44   TEST_PASSFAIL
  45
  46 RVTEST_CODE_END
  47
  48   .data
  49 RVTEST_DATA_BEGIN
  50
  51   TEST_DATA
  52
  53 RVTEST_DATA_END