isa/rv32ui/beq.S

   1 #*****************************************************************************
   2 # beq.S
   3 #-----------------------------------------------------------------------------
   4 #
   5 # Test beq instruction.
   6 #
   7
   8 #include "riscv_test.h"
   9 #include "test_macros.h"
  10
  11 RVTEST_RV32U
  12 RVTEST_CODE_BEGIN
  13
  14   #-------------------------------------------------------------
  15   # Branch tests
  16   #-------------------------------------------------------------
  17
  18   # Each test checks both forward and backward branches
  19
  20   TEST_BR2_OP_TAKEN( 2, beq,  0,  0 );
  21   TEST_BR2_OP_TAKEN( 3, beq,  1,  1 );
  22   TEST_BR2_OP_TAKEN( 4, beq, -1, -1 );
  23
  24   TEST_BR2_OP_NOTTAKEN( 5, beq,  0,  1 );
  25   TEST_BR2_OP_NOTTAKEN( 6, beq,  1,  0 );
  26   TEST_BR2_OP_NOTTAKEN( 7, beq, -1,  1 );
  27   TEST_BR2_OP_NOTTAKEN( 8, beq,  1, -1 );
  28
  29   #-------------------------------------------------------------
  30   # Bypassing tests
  31   #-------------------------------------------------------------
  32
  33   TEST_BR2_SRC12_BYPASS( 9,  0, 0, beq, 0, -1 );
  34   TEST_BR2_SRC12_BYPASS( 10, 0, 1, beq, 0, -1 );
  35   TEST_BR2_SRC12_BYPASS( 11, 0, 2, beq, 0, -1 );
  36   TEST_BR2_SRC12_BYPASS( 12, 1, 0, beq, 0, -1 );
  37   TEST_BR2_SRC12_BYPASS( 13, 1, 1, beq, 0, -1 );
  38   TEST_BR2_SRC12_BYPASS( 14, 2, 0, beq, 0, -1 );
  39
  40   TEST_BR2_SRC12_BYPASS( 15, 0, 0, beq, 0, -1 );
  41   TEST_BR2_SRC12_BYPASS( 16, 0, 1, beq, 0, -1 );
  42   TEST_BR2_SRC12_BYPASS( 17, 0, 2, beq, 0, -1 );
  43   TEST_BR2_SRC12_BYPASS( 18, 1, 0, beq, 0, -1 );
  44   TEST_BR2_SRC12_BYPASS( 19, 1, 1, beq, 0, -1 );
  45   TEST_BR2_SRC12_BYPASS( 20, 2, 0, beq, 0, -1 );
  46
  47   #-------------------------------------------------------------
  48   # Test delay slot instructions not executed nor bypassed
  49   #-------------------------------------------------------------
  50
  51   TEST_CASE( 21, x1, 3, \
  52     li  x1, 1; \
  53     beq x0, x0, 1f; \
  54     addi x1, x1, 1; \
  55     addi x1, x1, 1; \
  56     addi x1, x1, 1; \
  57     addi x1, x1, 1; \
  58 1:  addi x1, x1, 1; \
  59     addi x1, x1, 1; \
  60   )
  61
  62   TEST_PASSFAIL
  63
  64 RVTEST_CODE_END
  65
  66   .data
  67 RVTEST_DATA_BEGIN
  68
  69   TEST_DATA
  70
  71 RVTEST_DATA_END