Merge branch 'master' of github.com:ucb-bar/riscv-tests
[riscv-tests.git] / isa / rv32ui / divw.S
1 #*****************************************************************************
2 # divw.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test divw instruction.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV32U
12 RVTEST_CODE_BEGIN
13
14 #-------------------------------------------------------------
15 # Arithmetic tests
16 #-------------------------------------------------------------
17
18 TEST_RR_OP( 2, divw, 3, 20, 6 );
19 TEST_RR_OP( 3, divw, -3, -20, 6 );
20 TEST_RR_OP( 4, divw, -3, 20, -6 );
21 TEST_RR_OP( 5, divw, 3, -20, -6 );
22
23 TEST_RR_OP( 6, divw, -1<<31, -1<<31, 1 );
24 TEST_RR_OP( 7, divw, -1<<31, -1<<31, -1 );
25
26 TEST_RR_OP( 8, divw, -1, -1<<31, 0 );
27 TEST_RR_OP( 9, divw, -1, 1, 0 );
28 TEST_RR_OP(10, divw, -1, 0, 0 );
29
30 TEST_PASSFAIL
31
32 RVTEST_CODE_END
33
34 .data
35 RVTEST_DATA_BEGIN
36
37 TEST_DATA
38
39 RVTEST_DATA_END