Merge pull request #7 from riscv/nan2
[riscv-tests.git] / isa / rv32ui / jal.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # jal.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test jal instruction.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV32U
14 RVTEST_CODE_BEGIN
15
16 #-------------------------------------------------------------
17 # Test 2: Basic test
18 #-------------------------------------------------------------
19
20 test_2:
21 li TESTNUM, 2
22 li ra, 0
23
24 linkaddr_2:
25 jal target_2
26 nop
27 nop
28
29 j fail
30
31 target_2:
32 la x2, linkaddr_2
33 addi x2, x2, 4
34 bne x2, ra, fail
35
36 #-------------------------------------------------------------
37 # Test delay slot instructions not executed nor bypassed
38 #-------------------------------------------------------------
39
40 TEST_CASE( 3, x2, 3, \
41 li x2, 1; \
42 jal 1f; \
43 addi x2, x2, 1; \
44 addi x2, x2, 1; \
45 addi x2, x2, 1; \
46 addi x2, x2, 1; \
47 1: addi x2, x2, 1; \
48 addi x2, x2, 1; \
49 )
50
51 TEST_PASSFAIL
52
53 RVTEST_CODE_END
54
55 .data
56 RVTEST_DATA_BEGIN
57
58 TEST_DATA
59
60 RVTEST_DATA_END