Merge branch 'master' of github.com:ucb-bar/riscv-tests
[riscv-tests.git] / isa / rv32ui / sb.S
1 #*****************************************************************************
2 # sb.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test sb instruction.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV32U
12 RVTEST_CODE_BEGIN
13
14 #-------------------------------------------------------------
15 # Basic tests
16 #-------------------------------------------------------------
17
18 TEST_ST_OP( 2, lb, sb, 0xffffffaa, 0, tdat );
19 TEST_ST_OP( 3, lb, sb, 0x00000000, 1, tdat );
20 #ifdef __RISCVEL
21 TEST_ST_OP( 4, lh, sb, 0xffffefa0, 2, tdat );
22 #elif defined(__RISCVEB)
23 #else
24 TEST_ST_OP( 4, lh, sb, 0xffffa0ef, 2, tdat );
25 #error unknown endianness!
26 #endif
27 TEST_ST_OP( 5, lb, sb, 0x0000000a, 3, tdat );
28
29 # Test with negative offset
30
31 TEST_ST_OP( 6, lb, sb, 0xffffffaa, -3, tdat8 );
32 TEST_ST_OP( 7, lb, sb, 0x00000000, -2, tdat8 );
33 TEST_ST_OP( 8, lb, sb, 0xffffffa0, -1, tdat8 );
34 TEST_ST_OP( 9, lb, sb, 0x0000000a, 0, tdat8 );
35
36 # Test with a negative base
37
38 TEST_CASE( 10, x3, 0x78, \
39 la x1, tdat9; \
40 li x2, 0x12345678; \
41 addi x4, x1, -32; \
42 sb x2, 32(x4); \
43 lb x3, 0(x1); \
44 )
45
46 # Test with unaligned base
47
48 TEST_CASE( 11, x3, 0xffffff98, \
49 la x1, tdat9; \
50 li x2, 0x00003098; \
51 addi x1, x1, -6; \
52 sb x2, 7(x1); \
53 la x4, tdat10; \
54 lb x3, 0(x4); \
55 )
56
57 #-------------------------------------------------------------
58 # Bypassing tests
59 #-------------------------------------------------------------
60
61 TEST_ST_SRC12_BYPASS( 12, 0, 0, lb, sb, 0xffffffdd, 0, tdat );
62 TEST_ST_SRC12_BYPASS( 13, 0, 1, lb, sb, 0xffffffcd, 1, tdat );
63 TEST_ST_SRC12_BYPASS( 14, 0, 2, lb, sb, 0xffffffcc, 2, tdat );
64 TEST_ST_SRC12_BYPASS( 15, 1, 0, lb, sb, 0xffffffbc, 3, tdat );
65 TEST_ST_SRC12_BYPASS( 16, 1, 1, lb, sb, 0xffffffbb, 4, tdat );
66 TEST_ST_SRC12_BYPASS( 17, 2, 0, lb, sb, 0xffffffab, 5, tdat );
67
68 TEST_ST_SRC21_BYPASS( 18, 0, 0, lb, sb, 0x33, 0, tdat );
69 TEST_ST_SRC21_BYPASS( 19, 0, 1, lb, sb, 0x23, 1, tdat );
70 TEST_ST_SRC21_BYPASS( 20, 0, 2, lb, sb, 0x22, 2, tdat );
71 TEST_ST_SRC21_BYPASS( 21, 1, 0, lb, sb, 0x12, 3, tdat );
72 TEST_ST_SRC21_BYPASS( 22, 1, 1, lb, sb, 0x11, 4, tdat );
73 TEST_ST_SRC21_BYPASS( 23, 2, 0, lb, sb, 0x01, 5, tdat );
74
75 li a0, 0xef
76 la a1, tdat
77 sb a0, 3(a1)
78
79 TEST_PASSFAIL
80
81 RVTEST_CODE_END
82
83 .data
84 RVTEST_DATA_BEGIN
85
86 TEST_DATA
87
88 tdat:
89 tdat1: .byte 0xef
90 tdat2: .byte 0xef
91 tdat3: .byte 0xef
92 tdat4: .byte 0xef
93 tdat5: .byte 0xef
94 tdat6: .byte 0xef
95 tdat7: .byte 0xef
96 tdat8: .byte 0xef
97 tdat9: .byte 0xef
98 tdat10: .byte 0xef
99
100 RVTEST_DATA_END