isa/rv32ui/sh.S

   1 # See LICENSE for license details.
   2
   3 #*****************************************************************************
   4 # sh.S
   5 #-----------------------------------------------------------------------------
   6 #
   7 # Test sh instruction.
   8 #
   9
  10 #include "riscv_test.h"
  11 #include "test_macros.h"
  12
  13 RVTEST_RV32U
  14 RVTEST_CODE_BEGIN
  15
  16   #-------------------------------------------------------------
  17   # Basic tests
  18   #-------------------------------------------------------------
  19
  20   TEST_ST_OP( 2, lh, sh, 0x000000aa, 0, tdat );
  21   TEST_ST_OP( 3, lh, sh, 0xffffaa00, 2, tdat );
  22   TEST_ST_OP( 4, lw, sh, 0xbeef0aa0, 4, tdat );
  23   TEST_ST_OP( 5, lh, sh, 0xffffa00a, 6, tdat );
  24
  25   # Test with negative offset
  26
  27   TEST_ST_OP( 6, lh, sh, 0x000000aa, -6, tdat8 );
  28   TEST_ST_OP( 7, lh, sh, 0xffffaa00, -4, tdat8 );
  29   TEST_ST_OP( 8, lh, sh, 0x00000aa0, -2, tdat8 );
  30   TEST_ST_OP( 9, lh, sh, 0xffffa00a, 0,  tdat8 );
  31
  32   # Test with a negative base
  33
  34   TEST_CASE( 10, x3, 0x5678, \
  35     la  x1, tdat9; \
  36     li  x2, 0x12345678; \
  37     addi x4, x1, -32; \
  38     sh x2, 32(x4); \
  39     lh x3, 0(x1); \
  40   )
  41
  42   # Test with unaligned base
  43
  44   TEST_CASE( 11, x3, 0x3098, \
  45     la  x1, tdat9; \
  46     li  x2, 0x00003098; \
  47     addi x1, x1, -5; \
  48     sh x2, 7(x1); \
  49     la  x4, tdat10; \
  50     lh x3, 0(x4); \
  51   )
  52
  53   #-------------------------------------------------------------
  54   # Bypassing tests
  55   #-------------------------------------------------------------
  56
  57   TEST_ST_SRC12_BYPASS( 12, 0, 0, lh, sh, 0xffffccdd, 0,  tdat );
  58   TEST_ST_SRC12_BYPASS( 13, 0, 1, lh, sh, 0xffffbccd, 2,  tdat );
  59   TEST_ST_SRC12_BYPASS( 14, 0, 2, lh, sh, 0xffffbbcc, 4,  tdat );
  60   TEST_ST_SRC12_BYPASS( 15, 1, 0, lh, sh, 0xffffabbc, 6, tdat );
  61   TEST_ST_SRC12_BYPASS( 16, 1, 1, lh, sh, 0xffffaabb, 8, tdat );
  62   TEST_ST_SRC12_BYPASS( 17, 2, 0, lh, sh, 0xffffdaab, 10, tdat );
  63
  64   TEST_ST_SRC21_BYPASS( 18, 0, 0, lh, sh, 0x2233, 0,  tdat );
  65   TEST_ST_SRC21_BYPASS( 19, 0, 1, lh, sh, 0x1223, 2,  tdat );
  66   TEST_ST_SRC21_BYPASS( 20, 0, 2, lh, sh, 0x1122, 4,  tdat );
  67   TEST_ST_SRC21_BYPASS( 21, 1, 0, lh, sh, 0x0112, 6, tdat );
  68   TEST_ST_SRC21_BYPASS( 22, 1, 1, lh, sh, 0x0011, 8, tdat );
  69   TEST_ST_SRC21_BYPASS( 23, 2, 0, lh, sh, 0x3001, 10, tdat );
  70
  71   #---------------------------------------------------------------
  72   # Side effect tests
  73   #---------------------------------------------------------------
  74
  75   # sh to a word aligned address should only affect the 2 lower bytes
  76   # and should leave the 2 upper bytes unmodified.
  77   #
  78   # In this test we write 2 bytes to the lower 2 bytes of the word
  79   # tdat11 and then ensure that the both the upper 2 bytes and
  80   # lower 2 bytes are as expected.
  81   TEST_CASE( 24, x3, 0x12343098, \
  82     la  x1, tdat11; \
  83     li  x2, 0x00003098; \
  84     sh x2, 0(x1); \
  85     lw x3, 0(x1); \
  86   )
  87
  88   li a0, 0xbeef
  89   la a1, tdat
  90   sh a0, 6(a1)
  91
  92   TEST_PASSFAIL
  93
  94 RVTEST_CODE_END
  95
  96   .data
  97 RVTEST_DATA_BEGIN
  98
  99   TEST_DATA
 100
 101 tdat:
 102 tdat1:  .half 0xbeef
 103 tdat2:  .half 0xbeef
 104 tdat3:  .half 0xbeef
 105 tdat4:  .half 0xbeef
 106 tdat5:  .half 0xbeef
 107 tdat6:  .half 0xbeef
 108 tdat7:  .half 0xbeef
 109 tdat8:  .half 0xbeef
 110 tdat9:  .half 0xbeef
 111 tdat10: .half 0xbeef
 112 tdat11: .word 0x12345678
 113
 114 RVTEST_DATA_END