Fixed srl, srli
[riscv-tests.git] / isa / rv32ui / srai.S
1 #*****************************************************************************
2 # srai.S
3 #-----------------------------------------------------------------------------
4 #
5 # Test srai instruction.
6 #
7
8 #include "riscv_test.h"
9 #include "test_macros.h"
10
11 RVTEST_RV32U
12 RVTEST_CODE_BEGIN
13
14 #-------------------------------------------------------------
15 # Arithmetic tests
16 #-------------------------------------------------------------
17
18 TEST_IMM_OP( 2, srai, 0x00000000, 0x00000000, 0 );
19 TEST_IMM_OP( 3, srai, 0xc0000000, 0x80000000, 1 );
20 TEST_IMM_OP( 4, srai, 0xff000000, 0x80000000, 7 );
21 TEST_IMM_OP( 5, srai, 0xfffe0000, 0x80000000, 14 );
22 TEST_IMM_OP( 6, srai, 0xffffffff, 0x80000001, 31 );
23
24 TEST_IMM_OP( 7, srai, 0x7fffffff, 0x7fffffff, 0 );
25 TEST_IMM_OP( 8, srai, 0x3fffffff, 0x7fffffff, 1 );
26 TEST_IMM_OP( 9, srai, 0x00ffffff, 0x7fffffff, 7 );
27 TEST_IMM_OP( 10, srai, 0x0001ffff, 0x7fffffff, 14 );
28 TEST_IMM_OP( 11, srai, 0x00000000, 0x7fffffff, 31 );
29
30 TEST_IMM_OP( 12, srai, 0x81818181, 0x81818181, 0 );
31 TEST_IMM_OP( 13, srai, 0xc0c0c0c0, 0x81818181, 1 );
32 TEST_IMM_OP( 14, srai, 0xff030303, 0x81818181, 7 );
33 TEST_IMM_OP( 15, srai, 0xfffe0606, 0x81818181, 14 );
34 TEST_IMM_OP( 16, srai, 0xffffffff, 0x81818181, 31 );
35
36 #-------------------------------------------------------------
37 # Source/Destination tests
38 #-------------------------------------------------------------
39
40 TEST_IMM_SRC1_EQ_DEST( 17, srai, 0xff000000, 0x80000000, 7 );
41
42 #-------------------------------------------------------------
43 # Bypassing tests
44 #-------------------------------------------------------------
45
46 TEST_IMM_DEST_BYPASS( 18, 0, srai, 0xff000000, 0x80000000, 7 );
47 TEST_IMM_DEST_BYPASS( 19, 1, srai, 0xfffe0000, 0x80000000, 14 );
48 TEST_IMM_DEST_BYPASS( 20, 2, srai, 0xffffffff, 0x80000001, 31 );
49
50 TEST_IMM_SRC1_BYPASS( 21, 0, srai, 0xff000000, 0x80000000, 7 );
51 TEST_IMM_SRC1_BYPASS( 22, 1, srai, 0xfffe0000, 0x80000000, 14 );
52 TEST_IMM_SRC1_BYPASS( 23, 2, srai, 0xffffffff, 0x80000001, 31 );
53
54 TEST_IMM_ZEROSRC1( 24, srai, 0, 31 );
55 TEST_IMM_ZERODEST( 25, srai, 33, 20 );
56 #
57 TEST_PASSFAIL
58
59 RVTEST_CODE_END
60
61 .data
62 RVTEST_DATA_BEGIN
63
64 TEST_DATA
65
66 RVTEST_DATA_END