isa/rv32ui/srli.S

   1 #*****************************************************************************
   2 # srli.S
   3 #-----------------------------------------------------------------------------
   4 #
   5 # Test srli instruction.
   6 #
   7
   8 #include "riscv_test.h"
   9 #include "test_macros.h"
  10
  11 RVTEST_RV32U
  12 RVTEST_CODE_BEGIN
  13
  14   #-------------------------------------------------------------
  15   # Arithmetic tests
  16   #-------------------------------------------------------------
  17
  18   TEST_IMM_OP( 2,  srli, 0xffff8000, 0xffff8000, 0  );
  19   TEST_IMM_OP( 3,  srli, 0x7fffc000, 0xffff8000, 1  );
  20   TEST_IMM_OP( 4,  srli, 0x01ffff00, 0xffff8000, 7  );
  21   TEST_IMM_OP( 5,  srli, 0x0003fffe, 0xffff8000, 14 );
  22   TEST_IMM_OP( 6,  srli, 0x0001ffff, 0xffff8001, 15 );
  23
  24   TEST_IMM_OP( 7,  srli, 0xffffffff, 0xffffffff, 0  );
  25   TEST_IMM_OP( 8,  srli, 0x7fffffff, 0xffffffff, 1  );
  26   TEST_IMM_OP( 9,  srli, 0x01ffffff, 0xffffffff, 7  );
  27   TEST_IMM_OP( 10, srli, 0x0003ffff, 0xffffffff, 14 );
  28   TEST_IMM_OP( 11, srli, 0x00000001, 0xffffffff, 31 );
  29
  30   TEST_IMM_OP( 12, srli, 0x21212121, 0x21212121, 0  );
  31   TEST_IMM_OP( 13, srli, 0x10909090, 0x21212121, 1  );
  32   TEST_IMM_OP( 14, srli, 0x00424242, 0x21212121, 7  );
  33   TEST_IMM_OP( 15, srli, 0x00008484, 0x21212121, 14 );
  34   TEST_IMM_OP( 16, srli, 0x00000000, 0x21212121, 31 );
  35
  36   # Verify that shifts only use bottom five bits
  37
  38   TEST_IMM_OP( 17, srli, 0x21212121, 0x21212121, 0xffffffc0 );
  39   TEST_IMM_OP( 18, srli, 0x10909090, 0x21212121, 0xffffffc1 );
  40   TEST_IMM_OP( 19, srli, 0x00424242, 0x21212121, 0xffffffc7 );
  41   TEST_IMM_OP( 20, srli, 0x00008484, 0x21212121, 0xffffffce );
  42
  43
  44
  45   #-------------------------------------------------------------
  46   # Source/Destination tests
  47   #-------------------------------------------------------------
  48
  49   TEST_IMM_SRC1_EQ_DEST( 21, srli, 0x7fffc000, 0xffff8000, 1  );
  50
  51   #-------------------------------------------------------------
  52   # Bypassing tests
  53   #-------------------------------------------------------------
  54
  55   TEST_IMM_DEST_BYPASS( 22, 0, srl, 0x7fffc000, 0xffff8000, 1  );
  56   TEST_IMM_DEST_BYPASS( 23, 1, srl, 0x0003fffe, 0xffff8000, 14 );
  57   TEST_IMM_DEST_BYPASS( 24, 2, srl, 0x0001ffff, 0xffff8000, 15 );
  58
  59   TEST_IMM_SRC1_BYPASS( 25, 0, srl, 0x7fffc000, 0xffff8000, 1  );
  60   TEST_IMM_SRC1_BYPASS( 26, 1, srl, 0x0003fffe, 0xffff8000, 14 );
  61   TEST_IMM_SRC1_BYPASS( 27, 2, srl, 0x0001ffff, 0xffff8000, 15 );
  62
  63
  64   TEST_IMM_ZEROSRC1( 28, srli, 0, 31 );
  65   TEST_IMM_ZERODEST( 29, srli, 33, 20 );
  66
  67   TEST_PASSFAIL
  68
  69 RVTEST_CODE_END
  70
  71   .data
  72 RVTEST_DATA_BEGIN
  73
  74   TEST_DATA
  75
  76 RVTEST_DATA_END