isa/rv64mi/ipi.S

   1 # See LICENSE for license details.
   2
   3 #*****************************************************************************
   4 # ipi.S
   5 #-----------------------------------------------------------------------------
   6 #
   7 # Test interprocessor interrupts.
   8 #
   9
  10 #include "riscv_test.h"
  11 #include "test_macros.h"
  12
  13 RVTEST_RV64M
  14 RVTEST_CODE_BEGIN
  15
  16   # enable interrupts
  17   csrs mstatus, MSTATUS_IE
  18   csrs mie, MIP_MSIP
  19
  20   # get a unique core id
  21   la a0, coreid
  22   li a1, 1
  23   amoadd.w a2, a1, (a0)
  24
  25   # for now, only run this on core 0
  26   1:li a3, 1
  27   bgeu a2, a3, 1b
  28
  29   # wait for all cores to boot
  30   1: lw a1, (a0)
  31   bltu a1, a3, 1b
  32
  33   # IPI dominoes
  34   csrr a0, mhartid
  35   1: bnez a0, 1b
  36   add a0, a0, 1
  37   rem a0, a0, a3
  38   csrw send_ipi, a0
  39   1: j 1b
  40
  41 mtvec_handler:
  42   csrr a0, mhartid
  43   bnez a0, 2f
  44   RVTEST_PASS
  45
  46   TEST_PASSFAIL
  47
  48   2: add a0, a0, 1
  49   rem a0, a0, a3
  50   csrw send_ipi, a0
  51   1: j 1b
  52
  53 RVTEST_CODE_END
  54
  55   .data
  56 RVTEST_DATA_BEGIN
  57
  58   TEST_DATA
  59
  60 coreid: .word 0
  61 foo: .word 0
  62
  63 RVTEST_DATA_END