f7048275dcc215469ea31367bcfecaa76f2cac18
[riscv-tests.git] / isa / rv64mi / mcsr.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # mcsr.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test various M-mode CSRs.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64M
14 RVTEST_CODE_BEGIN
15
16 # Check that mcpuid reports the correct XLEN
17 #ifdef __riscv64
18 TEST_CASE(2, a0, 0x2, csrr a0, misa; srl a0, a0, 62)
19 #else
20 TEST_CASE(2, a0, 0x1, csrr a0, misa; srl a0, a0, 30)
21 #endif
22
23 # Check that mhartid reports 0
24 TEST_CASE(3, a0, 0x0, csrr a0, mhartid)
25
26 # Check that reading the following CSRs doesn't cause an exception
27 csrr a0, mimpid
28 csrr a0, marchid
29 csrr a0, mvendorid
30
31 # Check that writing hte following CSRs doesn't cause an exception
32 li t0, 0
33 csrs mtvec, t0
34 csrs mepc, t0
35
36 TEST_PASSFAIL
37
38 RVTEST_CODE_END