35fc99a52feed5f0cc7a5613983ab4075afbb65d
[riscv-tests.git] / isa / rv64si / csr.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # csr.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test CSRRx and CSRRxI instructions.
8 #
9
10 #include "riscv_test.h"
11 #include "test_macros.h"
12
13 RVTEST_RV64S
14 RVTEST_CODE_BEGIN
15
16 #ifdef __MACHINE_MODE
17 #define sscratch mscratch
18 #define sstatus mstatus
19 #define scause mcause
20 #define sepc mepc
21 #define sret mret
22 #define stvec_handler mtvec_handler
23 #undef SSTATUS_SPP
24 #define SSTATUS_SPP MSTATUS_MPP
25 #endif
26
27 csrwi sscratch, 3
28 TEST_CASE( 2, a0, 3, csrr a0, sscratch);
29 TEST_CASE( 3, a1, 3, csrrci a1, sscratch, 1);
30 TEST_CASE( 4, a2, 2, csrrsi a2, sscratch, 4);
31 TEST_CASE( 5, a3, 6, csrrwi a3, sscratch, 2);
32 TEST_CASE( 6, a1, 2, li a0, 0xbad1dea; csrrw a1, sscratch, a0);
33 TEST_CASE( 7, a0, 0xbad1dea, li a0, 0x0001dea; csrrc a0, sscratch, a0);
34 TEST_CASE( 8, a0, 0xbad0000, li a0, 0x000beef; csrrs a0, sscratch, a0);
35 TEST_CASE( 9, a0, 0xbadbeef, csrr a0, sscratch);
36
37 # Make sure writing the cycle counter causes an exception.
38 # Don't run in supervisor, as we don't delegate illegal instruction traps.
39 #ifdef __MACHINE_MODE
40 TEST_CASE(10, a0, 255, li a0, 255; csrrw a0, cycle, x0);
41 #endif
42
43 # jump to user land
44 li t0, SSTATUS_SPP
45 csrc sstatus, t0
46 la t0, 1f
47 csrw sepc, t0
48 sret
49 1:
50
51 # Make sure reading status in user mode causes an exception.
52 # Don't run in supervisor, as we don't delegate illegal instruction traps.
53 #ifdef __MACHINE_MODE
54 TEST_CASE(11, a0, 255, li a0, 255; csrr a0, sstatus)
55 #else
56 TEST_CASE(11, x0, 0, nop)
57 #endif
58
59 RVTEST_PASS
60
61 # We should only fall through to this if scall failed.
62 TEST_PASSFAIL
63
64 stvec_handler:
65 # Trapping on tests 10 and 11 is good news.
66 # Note that since the test didn't complete, TESTNUM is smaller by 1.
67 li t0, 9
68 beq TESTNUM, t0, privileged
69 li t0, 10
70 beq TESTNUM, t0, privileged
71
72 # catch RVTEST_PASS and kick it up to M-mode
73 csrr t0, scause
74 li t1, CAUSE_USER_ECALL
75 bne t0, t1, fail
76 RVTEST_PASS
77
78 privileged:
79 # Make sure scause indicates a lack of privilege.
80 csrr t0, scause
81 li t1, CAUSE_ILLEGAL_INSTRUCTION
82 bne t0, t1, fail
83 # Return to user mode, but skip the trapping instruction.
84 csrr t0, sepc
85 addi t0, t0, 4
86 csrw sepc, t0
87 sret
88
89 RVTEST_CODE_END
90
91 .data
92 RVTEST_DATA_BEGIN
93
94 TEST_DATA
95
96 RVTEST_DATA_END